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Searched refs:R700 (Results 1 – 25 of 41) sorted by relevance

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/external/llvm/lib/Target/AMDGPU/
DR700Instructions.td1 //===-- R700Instructions.td - R700 Instruction defs -------*- tablegen -*-===//
11 // - Available to R700 and newer VLIW4/VLIW5 GPUs
12 // - Available only on R700 family GPUs.
16 def isR700 : Predicate<"Subtarget->getGeneration() == AMDGPUSubtarget::R700">;
DAMDGPUInstrInfo.cpp98 case AMDGPUSubtarget::R700: in subtargetEncodingFamily()
DProcessors.td29 // R700
DAMDGPUSubtarget.h41 R700, enumerator
DAMDGPU.td281 def FeatureR700 : SubtargetFeatureGeneration<"R700",
/external/llvm-project/llvm/lib/Target/AMDGPU/
DR700Instructions.td1 //===-- R700Instructions.td - R700 Instruction defs -------*- tablegen -*-===//
10 // - Available to R700 and newer VLIW4/VLIW5 GPUs
11 // - Available only on R700 family GPUs.
15 def isR700 : Predicate<"Subtarget->getGeneration() == AMDGPUSubtarget::R700">;
DR600Processors.td51 def FeatureR700 : R600SubtargetFeatureGeneration<"R700", "r700",
87 // Radeon HD 4000 Series (R700).
DR600InstrFormats.td13 def isR600 : Predicate<"Subtarget->getGeneration() <= AMDGPUSubtarget::R700">;
DAMDGPUSubtarget.h54 R700 = 1, enumerator
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AMDGPU/
DR700Instructions.td1 //===-- R700Instructions.td - R700 Instruction defs -------*- tablegen -*-===//
10 // - Available to R700 and newer VLIW4/VLIW5 GPUs
11 // - Available only on R700 family GPUs.
15 def isR700 : Predicate<"Subtarget->getGeneration() == AMDGPUSubtarget::R700">;
DR600Processors.td51 def FeatureR700 : R600SubtargetFeatureGeneration<"R700", "r700",
87 // Radeon HD 4000 Series (R700).
DAMDGPUSubtarget.h52 R700 = 1, enumerator
DR600InstrFormats.td13 def isR600 : Predicate<"Subtarget->getGeneration() <= AMDGPUSubtarget::R700">;
/external/mesa3d/src/gallium/drivers/r600/
Dr600_hw_context.c142 if (rctx->b.chip_class >= R700 && in r600_flush_emit()
148 if (rctx->b.chip_class >= R700 && in r600_flush_emit()
189 if (rctx->b.chip_class >= R700 && in r600_flush_emit()
199 if (rctx->b.chip_class >= R700 && in r600_flush_emit()
218 if (rctx->b.chip_class >= R700 && in r600_flush_emit()
400 if (ctx->b.chip_class <= R700) { in r600_begin_new_cs()
Dr600_pipe.c176 case R700: in r600_create_context()
180 rctx->custom_blend_resolve = rctx->b.chip_class == R700 ? r700_create_resolve_blend(rctx) in r600_create_context()
341 return rscreen->b.chip_class > R700; in r600_get_param()
520 return rscreen->b.chip_class >= R700; in r600_get_param()
755 case R700: in r600_screen_create()
770 case R700: in r600_screen_create()
Dr600_state.c485 if (rctx->b.chip_class == R700) { in r600_create_rs_state()
514 if (rctx->b.chip_class >= R700) { in r600_create_rs_state()
561 if (rctx->b.chip_class == R700) { in r600_create_rs_state()
1576 if (rctx->b.chip_class >= R700) { in r600_emit_db_misc_state()
1593 if (rctx->b.chip_class >= R700) { in r600_emit_db_misc_state()
2305 if (rctx->b.chip_class >= R700) { in r600_init_atom_start_cs()
2386 if (rctx->b.chip_class >= R700) { in r600_init_atom_start_cs()
2419 if (rctx->b.chip_class == R700) in r600_init_atom_start_cs()
2421 if (rctx->b.chip_class == R700 && rctx->screen->b.has_streamout) in r600_init_atom_start_cs()
2680 if (rctx->b.chip_class >= R700) { in r600_update_gs_state()
Dr600_asm.c428 if (bc->chip_class >= R700) { in reserve_cfile()
1346 case R700: in r600_bytecode_num_tex_and_vtx_instructions()
1392 case R700: in r600_bytecode_add_vtx_internal()
1698 if (bc->chip_class == R700) in r600_bytecode_cf_build()
1799 case R700: in r600_bytecode_build()
2098 case R700: in r600_bytecode_disasm()
Dr600_state_common.c210 if (rctx->b.chip_class <= R700 && in r600_bind_blend_state_internal()
501 if (rctx->b.chip_class <= R700 && in r600_bind_sampler_states()
685 if (rctx->b.chip_class <= R700 && in r600_set_sampler_views()
1897 if (rctx->b.chip_class <= R700) { in r600_update_derived_state()
3087 if (chip <= R700) in r600_translate_colorformat()
/external/mesa3d/docs/relnotes/
D10.1.2.rst129 - r600g: fix edge flags and layered rendering on R600-R700
130 - r600g: disable async DMA on R700
133 - r600g: fix buffer copying on R600-R700
D7.9.rst32 - New, very experimental Gallium driver for R600-R700 Radeons.
/external/mesa3d/src/amd/common/
Damd_family.h120 R700, enumerator
/external/mesa3d/src/gallium/drivers/r600/sfn/
Dsfn_callstack.cpp95 case R700: in update_max_depth()
/external/mesa3d/src/gallium/drivers/r600/sb/
Dsb_context.cpp99 TRANSLATE_HW_CLASS(R700); in get_hw_class_name()
Dsb_core.cpp330 case R700: return HW_CLASS_R700; in translate_chip_class()
/external/llvm/docs/
DCompilerWriterInfo.rst70 * `AMD R7xx shader ISA <http://developer.amd.com/wordpress/media/2012/10/R700-Family_Instruction_Se…

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