| /external/libxaac/decoder/armv7/ |
| D | ixheaacd_tns_parcor2lpc_32x16.s | 42 MOV R9, #0x7FFFFFFF
43 MOV R10, R9, ASR R8
78 LDRSH R9, [R4, #-2]!
80 MOV R9, R9, LSL #16
84 QADD R9, R9, R2
86 QADD R14, R9, R5
87 MOVS R9, R9
90 @ RSBMIS R9, R9, #0
91 RSBSMI R9, R9, #0
92 MOVMI R9, #0x7FFFFFFF
[all …]
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| D | ixheaacd_sbr_qmfsyn64_winadd.s | 53 MOV R9, R7, LSL #1
54 ADD R1, R1, R9
57 MOV R9, R7, LSL #1
67 VLD1.16 D3, [R2], R9
72 VLD1.16 D5, [R2], R9
77 VLD1.16 D7, [R2], R9
82 VLD1.16 D9, [R2], R9
101 VLD1.16 D13, [R12], R9
106 VLD1.16 D15, [R12], R9
111 VLD1.16 D17, [R12], R9
[all …]
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| D | ixheaacd_esbr_qmfsyn64_winadd.s | 40 MOV R9, R7, LSL #1
41 ADD R1, R1, R9
44 MOV R9, R7, LSL #1 @(256*2)
56 VLD1.32 {D6, D7}, [R2], R9
62 VLD1.32 {D10, D11}, [R2], R9
68 VLD1.32 {D14, D15}, [R2], R9
74 VLD1.32 {D18, D19}, [R2], R9
94 VLD1.32 {D6, D7}, [R12], R9
100 VLD1.32 {D10, D11}, [R12], R9
106 VLD1.32 {D14, D15}, [R12], R9
[all …]
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| D | ixheaacd_apply_rot.s | 36 ADD R9, R5, R6
37 STRH R9, [R11, #-98]
46 ADD R9, R5, R6
47 STRH R9, [R11, #-2]
55 ADD R9, R5, R6
56 STRH R9, [R11, #-98]
66 ADD R9, R5, R6
67 STRH R9, [R11, #-2]
85 SMULWB R9, R5, R7
89 QADD R5, R9, R10
[all …]
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| D | ixheaacd_cos_sin_mod.s | 67 ADD R9, R0, R6
70 LDR R1, [R9], #-4
104 LDR R1, [R9, #0x104]
120 LDR R0, [R9], #-4
129 LDR R0, [R9, #0x104]
144 LDR R1, [R9], #-4
166 LDR R1, [R9, #0x104]
182 LDR R0, [R9], #-4
190 LDR R0, [R9, #0x104]
204 LDRGT R1, [R9], #-4
[all …]
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| D | ixheaacd_conv_ergtoamplitude.s | 39 MOV R9, #-16
58 MOV R9, R7, ASR #1
61 STRH R9, [R2, #-2]
67 MOV R9, #-16
85 MOV R9, R7, ASR #1
88 STRH R9, [R3, #-2]
95 MOV R9, #-16
113 MOV R9, R7, ASR #1
115 STRH R9, [R4, #-2]
117 SUB R6, R1, R9
|
| D | ixheaacd_post_twiddle_overlap.s | 35 LSL R9, R3, #2
36 ASR R9, R9, #1
37 ADD R6, R6, R9
46 RSB R9, R5, #15
52 LSL R8, R8, R9
60 LDR R9, [R1], #4
65 SMULWB R12, R9, R10
67 SMLAWT R7, R9, R10, R5
72 MOV R9, #50
74 SMULWB R10, R5, R9
[all …]
|
| D | ixheaacd_overlap_add1.s | 63 MOV R9, R6, LSL #1
132 VST1.16 D18[0], [R6], R9
134 VST1.16 D18[1], [R6], R9
136 VST1.16 D18[2], [R6], R9
138 VST1.16 D18[3], [R6], R9
186 VST1.16 D18[0], [R6], R9
188 VST1.16 D18[1], [R6], R9
190 VST1.16 D18[2], [R6], R9
200 VST1.16 D18[3], [R6], R9
243 VST1.16 D18[0], [R6], R9
[all …]
|
| D | ixheaacd_conv_ergtoamplitudelp.s | 63 MOV R9, #-16
80 MOV R9, R7, ASR #1
84 STRH R9, [R3, #2]
92 MOV R9, #-16
108 MOV R9, R7, ASR #1
112 STRH R9, [R4, #2]
114 SUB R6, R1, R9
|
| D | ixheaacd_sbr_qmfanal32_winadds.s | 35 MOV R9, R7, LSL #1
78 MOV R9, R0
113 MOV R0, R9
123 MOV R9, R1
153 MOV R1, R9
166 MOV R9, R0
207 MOV R0, R9
216 MOV R9, R1
245 MOV R1, R9
|
| D | ia_xheaacd_mps_reoder_mulshift_acc.s | 41 MUL R9, R5, R10
48 SUBS R9, R9, #8
56 MOV R9, R1
60 VLD1.32 {Q2, Q3}, [R9]! @LOADING values from R1 Si_fix
100 MOV R9, R1
104 VLD1.32 {Q2, Q3}, [R9]! @LOADING values from R1 Si_fix
143 MOV R9, R1
148 VLD1.32 {Q2, Q3}, [R9]! @LOADING values from R1 Si_fix
187 MOV R9, R1
192 VLD1.32 {Q2, Q3}, [R9]! @LOADING values from R1 Si_fix
|
| D | ixheaacd_pre_twiddle_compute.s | 45 LDR R9, [R0], #4
47 SMULWB R12, R9, R8
49 SMULWT R11, R9, R8
50 SMLAWT R9, R10, R8, R12
53 MVN R9, R9
54 ADD R9, R9, #1
63 ASR R9, R9, R8
68 LSL R9, R9, R5
73 STR R9, [R2], #4
|
| D | ixheaacd_sbr_qmfanal32_winadds_eld.s | 14 MOV R9, R7, LSL #1
58 MOV R9, R0
92 MOV R0, R9
102 MOV R9, R1
134 MOV R1, R9
147 MOV R9, R0
189 MOV R0, R9
198 MOV R9, R1
228 MOV R1, R9
|
| D | ixheaacd_rescale_subbandsamples.s | 37 ADD R9, R0, R5, LSL#2
38 LDR R10, [R9], #4
71 LDR R10, [R9], #4
96 LDR R10, [R9], #4
150 LDR R10, [R9], #4
196 LDR R10, [R9], #4
|
| D | ixheaacd_dct3_32.s | 39 MOV R9, #0
40 VDUP.32 D0, R9
56 SUB R9, R6, #144
65 VLD1.32 {Q3}, [R9]!
108 SUB R9, R6, #144
115 VLD1.32 {Q3}, [R9]!
143 SUB R9, R6, #144
146 VLD1.32 {Q3}, [R9]!
188 SUB R9, R6, #140
192 VLD1.32 D6, [R9]!
[all …]
|
| /external/libdrm/data/ |
| D | amdgpu.ids | 85 6640, 80, AMD Radeon (TM) R9 M380
86 6646, 0, AMD Radeon R9 M280X
87 6646, 80, AMD Radeon (TM) R9 M470X
88 6647, 0, AMD Radeon R9 M270X
89 6647, 80, AMD Radeon (TM) R9 M380
115 67B0, 0, AMD Radeon R9 200 Series
116 67B0, 80, AMD Radeon (TM) R9 390 Series
117 67B1, 0, AMD Radeon R9 200 Series
118 67B1, 80, AMD Radeon (TM) R9 390 Series
119 67B9, 0, AMD Radeon R9 200 Series
[all …]
|
| /external/tensorflow/tensorflow/compiler/mlir/xla/tests/translate/ |
| D | if_conditional.hlotxt | 36 // CHECK: [[R9:%.+]] = "mhlo.tuple"([[R8]])
37 // CHECK: "mhlo.return"([[R9]])
42 // CHECK: [[R9:%.+]] = "mhlo.tuple"([[R8]])
43 // CHECK: "mhlo.return"([[R9]])
|
| /external/llvm/test/CodeGen/Mips/ |
| D | atomic.ll | 142 ; ALL: sllv $[[R9:[0-9]+]], $4, $[[R5]]
150 ; ALL: addu $[[R13:[0-9]+]], $[[R12]], $[[R9]]
187 ; ALL: sllv $[[R9:[0-9]+]], $4, $[[R5]]
195 ; ALL: subu $[[R13:[0-9]+]], $[[R12]], $[[R9]]
232 ; ALL: sllv $[[R9:[0-9]+]], $4, $[[R5]]
240 ; ALL: and $[[R13:[0-9]+]], $[[R12]], $[[R9]]
278 ; ALL: sllv $[[R9:[0-9]+]], $4, $[[R5]]
282 ; ALL: and $[[R18:[0-9]+]], $[[R9]], $[[R7]]
320 ; ALL: andi $[[R9:[0-9]+]], $4, 255
321 ; ALL: sllv $[[R10:[0-9]+]], $[[R9]], $[[R5]]
[all …]
|
| /external/llvm/lib/Target/MSP430/ |
| D | MSP430RegisterInfo.cpp | 44 MSP430::R8, MSP430::R9, MSP430::R10, MSP430::R11, in getCalleeSavedRegs()
49 MSP430::R8, MSP430::R9, MSP430::R10, MSP430::R11, in getCalleeSavedRegs()
54 MSP430::R8, MSP430::R9, MSP430::R10, MSP430::R11, in getCalleeSavedRegs()
60 MSP430::R8, MSP430::R9, MSP430::R10, MSP430::R11, in getCalleeSavedRegs()
|
| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/MSP430/ |
| D | MSP430RegisterInfo.cpp | 43 MSP430::R8, MSP430::R9, MSP430::R10, in getCalleeSavedRegs()
48 MSP430::R8, MSP430::R9, MSP430::R10, in getCalleeSavedRegs()
53 MSP430::R8, MSP430::R9, MSP430::R10, MSP430::R11, in getCalleeSavedRegs()
59 MSP430::R8, MSP430::R9, MSP430::R10, MSP430::R11, in getCalleeSavedRegs()
|
| /external/llvm-project/llvm/lib/Target/MSP430/ |
| D | MSP430RegisterInfo.cpp | 43 MSP430::R8, MSP430::R9, MSP430::R10, in getCalleeSavedRegs()
48 MSP430::R8, MSP430::R9, MSP430::R10, in getCalleeSavedRegs()
53 MSP430::R8, MSP430::R9, MSP430::R10, MSP430::R11, in getCalleeSavedRegs()
59 MSP430::R8, MSP430::R9, MSP430::R10, MSP430::R11, in getCalleeSavedRegs()
|
| /external/pdfium/testing/resources/ |
| D | bug_547706.in | 18 /R9 scn
26 << /R9 7 0 R >>
|
| /external/pdfium/testing/resources/pixel/ |
| D | axial_shading_point_at_border_no_extend.in | 19 /R9 5 0 R
30 /R9 sh
|
| D | radial_shading_point_at_center.in | 19 /R9 5 0 R
30 /R9 sh
|
| /external/google-java-format/core/src/test/resources/com/google/googlejavaformat/java/testdata/ |
| D | Records.output | 24 record R9(int x) {
25 R9(int x) {
|