| /external/llvm/lib/CodeGen/ |
| D | TargetRegisterInfo.cpp | 31 regclass_iterator RCB, regclass_iterator RCE, in TargetRegisterInfo() argument
37 RegClassBegin(RCB), RegClassEnd(RCE), in TargetRegisterInfo()
227 const TargetRegisterClass *RCB, unsigned SubB, in getCommonSuperRegClass() argument
229 assert(RCA && SubA && RCB && SubB && "Invalid arguments"); in getCommonSuperRegClass()
246 if (RCA->getSize() < RCB->getSize()) { in getCommonSuperRegClass()
247 std::swap(RCA, RCB); in getCommonSuperRegClass()
258 for (SuperRegClassIterator IB(RCB, this, true); IB.isValid(); ++IB) { in getCommonSuperRegClass()
|
| /external/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/ |
| D | TargetRegisterInfo.cpp | 43 regclass_iterator RCB, regclass_iterator RCE, in TargetRegisterInfo() argument
51 RegClassBegin(RCB), RegClassEnd(RCE), in TargetRegisterInfo()
280 const TargetRegisterClass *RCB, unsigned SubB, in getCommonSuperRegClass() argument
282 assert(RCA && SubA && RCB && SubB && "Invalid arguments"); in getCommonSuperRegClass()
299 if (getRegSizeInBits(*RCA) < getRegSizeInBits(*RCB)) { in getCommonSuperRegClass()
300 std::swap(RCA, RCB); in getCommonSuperRegClass()
311 for (SuperRegClassIterator IB(RCB, this, true); IB.isValid(); ++IB) { in getCommonSuperRegClass()
|
| /external/llvm-project/llvm/lib/CodeGen/ |
| D | TargetRegisterInfo.cpp | 52 regclass_iterator RCB, regclass_iterator RCE, in TargetRegisterInfo() argument
60 RegClassBegin(RCB), RegClassEnd(RCE), in TargetRegisterInfo()
300 const TargetRegisterClass *RCB, unsigned SubB, in getCommonSuperRegClass() argument
302 assert(RCA && SubA && RCB && SubB && "Invalid arguments"); in getCommonSuperRegClass()
319 if (getRegSizeInBits(*RCA) < getRegSizeInBits(*RCB)) { in getCommonSuperRegClass()
320 std::swap(RCA, RCB); in getCommonSuperRegClass()
331 for (SuperRegClassIterator IB(RCB, this, true); IB.isValid(); ++IB) { in getCommonSuperRegClass()
|
| /external/swiftshader/third_party/llvm-10.0/llvm/include/llvm/CodeGen/ |
| D | TargetRegisterInfo.h | 249 regclass_iterator RCB,
646 const TargetRegisterClass *RCB, unsigned SubB,
|
| /external/llvm-project/llvm/include/llvm/CodeGen/ |
| D | TargetRegisterInfo.h | 249 regclass_iterator RCB,
665 const TargetRegisterClass *RCB, unsigned SubB,
|
| /external/llvm/include/llvm/Target/ |
| D | TargetRegisterInfo.h | 631 const TargetRegisterClass *RCB, unsigned SubB,
|
| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Hexagon/ |
| D | HexagonGenInsert.cpp | 837 RegisterCellBitCompareSel RCB(VR, S+L, L, BVO, *CMS); in findRecordInsertForms() local
838 iterator NewB = std::lower_bound(B, E, VR, RCB); in findRecordInsertForms()
839 iterator NewE = std::upper_bound(NewB, E, VR, RCB); in findRecordInsertForms()
|
| /external/llvm-project/llvm/lib/Target/Hexagon/ |
| D | HexagonGenInsert.cpp | 837 RegisterCellBitCompareSel RCB(VR, S+L, L, BVO, *CMS); in findRecordInsertForms() local
838 iterator NewB = std::lower_bound(B, E, VR, RCB); in findRecordInsertForms()
839 iterator NewE = std::upper_bound(NewB, E, VR, RCB); in findRecordInsertForms()
|
| /external/llvm/lib/Target/Hexagon/ |
| D | HexagonGenInsert.cpp | 794 RegisterCellBitCompareSel RCB(VR, S+L, L, BVO, *CMS); in findRecordInsertForms() local
795 iterator NewB = std::lower_bound(B, E, VR, RCB); in findRecordInsertForms()
796 iterator NewE = std::upper_bound(NewB, E, VR, RCB); in findRecordInsertForms()
|
| /external/cldr/tools/java/org/unicode/cldr/util/data/external/ |
| D | 2013-1_UNLOCODE_CodeListPart2.csv | 4138 ,"GB","RCB","Rhu Coigach - Badluachrach","Rhu Coigach - Badluachrach","HLD","1-------","RL","0901",…
14322 ,"IT","RCB","Ronco Briantino","Ronco Briantino","MI","-23-----","RL","0607",,"4539N 00924E",
|
| D | 2013-1_UNLOCODE_CodeListPart3.csv | 22765 ,"US","RCB","Raceland","Raceland","LA","-23-----","RL","0607",,"2943N 09036W",
28404 ,"ZA","RCB","Richards Bay","Richards Bay",,"1--4----","AF","9501",,,
|
| D | 2013-1_UNLOCODE_CodeListPart1.csv | 23369 ,"DE","RCB","Rothenschirmbach","Rothenschirmbach","ST","--3-----","RL","0701",,"5128N 01133E",
40459 ,"FR","RCB","Rochecorbon","Rochecorbon","37","0-------","RL","9501",,,
|