| /external/llvm/lib/CodeGen/ |
| D | RegisterClassInfo.cpp | 81 RCInfo &RCI = RegClass[RC->getID()]; in compute() local
86 if (!RCI.Order) in compute()
87 RCI.Order.reset(new MCPhysReg[NumRegs]); in compute()
112 RCI.Order[N++] = PhysReg; in compute()
116 RCI.NumRegs = N + CSRAlias.size(); in compute()
117 assert (RCI.NumRegs <= NumRegs && "Allocation order larger than regclass"); in compute()
125 RCI.Order[N++] = PhysReg; in compute()
130 if (StressRA && RCI.NumRegs > StressRA) in compute()
131 RCI.NumRegs = StressRA; in compute()
136 if (Super != RC && getNumAllocatableRegs(Super) > RCI.NumRegs) in compute()
[all …]
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| D | TargetRegisterInfo.cpp | 217 for (SuperRegClassIterator RCI(B, this); RCI.isValid(); ++RCI) in getMatchingSuperRegClass() local
218 if (RCI.getSubReg() == Idx) in getMatchingSuperRegClass()
221 return firstCommonClass(RCI.getMask(), A->getSubClassMask(), this); in getMatchingSuperRegClass()
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| D | ShrinkWrap.cpp | 101 RegisterClassInfo RCI; member in __anon32454b260111::ShrinkWrap
161 RCI.runOnMachineFunction(MF); in init()
238 UseOrDefCSR = RCI.getLastCalleeSavedAlias(PhysReg); in INITIALIZE_PASS_DEPENDENCY()
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| D | PostRASchedulerList.cpp | 208 const RegisterClassInfo &RCI, in SchedulePostRATDList() argument
225 (AntiDepBreaker *)new AggressiveAntiDepBreaker(MF, RCI, CriticalPathRCs) : in SchedulePostRATDList()
227 (AntiDepBreaker *)new CriticalAntiDepBreaker(MF, RCI) : nullptr)); in SchedulePostRATDList()
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| D | AggressiveAntiDepBreaker.h | 128 const RegisterClassInfo &RCI,
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/ |
| D | RegisterClassInfo.cpp | 92 RCInfo &RCI = RegClass[RC->getID()]; in compute() local
98 if (!RCI.Order) in compute()
99 RCI.Order.reset(new MCPhysReg[NumRegs]); in compute()
125 RCI.Order[N++] = PhysReg; in compute()
129 RCI.NumRegs = N + CSRAlias.size(); in compute()
130 assert(RCI.NumRegs <= NumRegs && "Allocation order larger than regclass"); in compute()
138 RCI.Order[N++] = PhysReg; in compute()
143 if (StressRA && RCI.NumRegs > StressRA) in compute()
144 RCI.NumRegs = StressRA; in compute()
149 if (Super != RC && getNumAllocatableRegs(Super) > RCI.NumRegs) in compute()
[all …]
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| D | TargetRegisterInfo.cpp | 270 for (SuperRegClassIterator RCI(B, this); RCI.isValid(); ++RCI) in getMatchingSuperRegClass() local
271 if (RCI.getSubReg() == Idx) in getMatchingSuperRegClass()
274 return firstCommonClass(RCI.getMask(), A->getSubClassMask(), this); in getMatchingSuperRegClass()
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| D | ShrinkWrap.cpp | 112 RegisterClassInfo RCI; member in __anon986d6a880111::ShrinkWrap
189 RCI.runOnMachineFunction(MF); in init()
292 RCI.getLastCalleeSavedAlias(PhysReg); in INITIALIZE_PASS_DEPENDENCY()
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| D | CriticalAntiDepBreaker.h | 74 CriticalAntiDepBreaker(MachineFunction& MFi, const RegisterClassInfo &RCI);
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| D | PostRASchedulerList.cpp | 208 const RegisterClassInfo &RCI, in SchedulePostRATDList() argument
225 (AntiDepBreaker *)new AggressiveAntiDepBreaker(MF, RCI, CriticalPathRCs) : in SchedulePostRATDList()
227 (AntiDepBreaker *)new CriticalAntiDepBreaker(MF, RCI) : nullptr)); in SchedulePostRATDList()
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| /external/llvm-project/llvm/lib/CodeGen/ |
| D | RegisterClassInfo.cpp | 92 RCInfo &RCI = RegClass[RC->getID()]; in compute() local
98 if (!RCI.Order) in compute()
99 RCI.Order.reset(new MCPhysReg[NumRegs]); in compute()
125 RCI.Order[N++] = PhysReg; in compute()
129 RCI.NumRegs = N + CSRAlias.size(); in compute()
130 assert(RCI.NumRegs <= NumRegs && "Allocation order larger than regclass"); in compute()
138 RCI.Order[N++] = PhysReg; in compute()
143 if (StressRA && RCI.NumRegs > StressRA) in compute()
144 RCI.NumRegs = StressRA; in compute()
149 if (Super != RC && getNumAllocatableRegs(Super) > RCI.NumRegs) in compute()
[all …]
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| D | TargetRegisterInfo.cpp | 290 for (SuperRegClassIterator RCI(B, this); RCI.isValid(); ++RCI) in getMatchingSuperRegClass() local
291 if (RCI.getSubReg() == Idx) in getMatchingSuperRegClass()
294 return firstCommonClass(RCI.getMask(), A->getSubClassMask(), this); in getMatchingSuperRegClass()
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| D | ShrinkWrap.cpp | 112 RegisterClassInfo RCI; member in __anon953222140111::ShrinkWrap
189 RCI.runOnMachineFunction(MF); in init()
292 RCI.getLastCalleeSavedAlias(PhysReg); in INITIALIZE_PASS_DEPENDENCY()
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| D | CriticalAntiDepBreaker.cpp | 42 const RegisterClassInfo &RCI) in CriticalAntiDepBreaker() argument
45 TRI(MF.getSubtarget().getRegisterInfo()), RegClassInfo(RCI), in CriticalAntiDepBreaker()
705 const RegisterClassInfo &RCI) { in createCriticalAntiDepBreaker() argument
706 return new CriticalAntiDepBreaker(MFi, RCI); in createCriticalAntiDepBreaker()
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| D | CriticalAntiDepBreaker.h | 74 CriticalAntiDepBreaker(MachineFunction& MFi, const RegisterClassInfo &RCI);
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| D | PostRASchedulerList.cpp | 206 const RegisterClassInfo &RCI, in SchedulePostRATDList() argument
222 ? createAggressiveAntiDepBreaker(MF, RCI, CriticalPathRCs) in SchedulePostRATDList()
224 ? createCriticalAntiDepBreaker(MF, RCI) in SchedulePostRATDList()
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| /external/llvm-project/llvm/include/llvm/CodeGen/ |
| D | RegisterClassInfo.h | 74 const RCInfo &RCI = RegClass[RC->getID()]; in get() local
75 if (Tag != RCI.Tag) in get()
77 return RCI; in get()
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| D | AntiDepBreaker.h | 88 MachineFunction &MFi, const RegisterClassInfo &RCI,
92 const RegisterClassInfo &RCI);
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| /external/swiftshader/third_party/llvm-10.0/llvm/include/llvm/CodeGen/ |
| D | RegisterClassInfo.h | 74 const RCInfo &RCI = RegClass[RC->getID()]; in get() local
75 if (Tag != RCI.Tag) in get()
77 return RCI; in get()
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| /external/llvm/include/llvm/CodeGen/ |
| D | RegisterClassInfo.h | 71 const RCInfo &RCI = RegClass[RC->getID()]; in get() local
72 if (Tag != RCI.Tag) in get()
74 return RCI; in get()
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| D | RegisterPressure.h | 343 const RegisterClassInfo *RCI;
381 MF(nullptr), TRI(nullptr), RCI(nullptr), LIS(nullptr), MBB(nullptr), P(rp),
385 MF(nullptr), TRI(nullptr), RCI(nullptr), LIS(nullptr), MBB(nullptr), P(rp),
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| /external/llvm/lib/Transforms/Scalar/ |
| D | ConstantHoisting.cpp | 149 for (auto const &RCI : ConstInfo.RebasedConstants) in findConstantInsertionPoint() local
150 for (auto const &U : RCI.Uses) in findConstantInsertionPoint()
561 for (auto const &RCI : ConstInfo.RebasedConstants) { in emitBaseConstants() local
563 for (auto const &U : RCI.Uses) in emitBaseConstants()
564 emitBaseConstants(Base, RCI.Offset, U); in emitBaseConstants()
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Transforms/Scalar/ |
| D | ConstantHoisting.cpp | 315 for (auto const &RCI : ConstInfo.RebasedConstants) in findConstantInsertionPoint() local
316 for (auto const &U : RCI.Uses) in findConstantInsertionPoint()
851 for (auto const &RCI : ConstInfo.RebasedConstants) { in emitBaseConstants() local
852 for (auto const &U : RCI.Uses) { in emitBaseConstants()
860 ToBeRebased.push_back(RebasedUse(RCI.Offset, RCI.Ty, U)); in emitBaseConstants()
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| /external/llvm-project/llvm/lib/Transforms/Scalar/ |
| D | ConstantHoisting.cpp | 315 for (auto const &RCI : ConstInfo.RebasedConstants) in findConstantInsertionPoint() local
316 for (auto const &U : RCI.Uses) in findConstantInsertionPoint()
856 for (auto const &RCI : ConstInfo.RebasedConstants) { in emitBaseConstants() local
857 for (auto const &U : RCI.Uses) { in emitBaseConstants()
865 ToBeRebased.push_back(RebasedUse(RCI.Offset, RCI.Ty, U)); in emitBaseConstants()
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| /external/swiftshader/third_party/llvm-10.0/llvm/include/llvm/Analysis/ |
| D | CGSCCPassManager.h | 767 for (auto RCI = CG.postorder_ref_scc_begin(),
769 RCI != RCE;) {
783 RCWorklist.insert(&*RCI++);
|