| /external/rust/crates/getrandom/ |
| D | CHANGELOG.md | 39 - `"rdrand"` - use the RDRAND instruction on `no_std` `x86`/`x86_64` targets [#133]
186 - Minor change of RDRAND AMD bug handling. [#48]
193 - Workaround for RDRAND hardware bug present on some AMD CPUs. [#43]
204 - Add support for `x86_64-unknown-uefi` target by using RDRAND with CPUID
214 - Improve RDRAND implementation. [#24]
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| D | Cargo.toml.orig | 35 # Feature to enable fallback RDRAND-based implementation on x86/x86_64
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| /external/tensorflow/tensorflow/core/platform/ |
| D | cpu_info.h | 87 RDRAND = 13, enumerator
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| D | cpu_info.cc | 238 case RDRAND: return cpuid->have_rdrand_; in TestFeature()
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| /external/mesa3d/src/gallium/drivers/swr/rasterizer/common/ |
| D | isa.hpp | 68 bool RDRAND(void) { return CPU_Rep.f_1_ECX_[30]; } in RDRAND() function in InstructionSet
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/X86/ |
| D | X86IntrinsicsInfo.h | 24 GATHER, SCATTER, PREFETCH, RDSEED, RDRAND, RDPMC, RDTSC, XTEST, XGETBV, ADX, FPCLASSS, enumerator
311 X86_INTRINSIC_DATA(rdrand_16, RDRAND, X86ISD::RDRAND, 0),
312 X86_INTRINSIC_DATA(rdrand_32, RDRAND, X86ISD::RDRAND, 0),
313 X86_INTRINSIC_DATA(rdrand_64, RDRAND, X86ISD::RDRAND, 0),
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| D | X86ScheduleZnver2.td | 796 // RDRAND.
797 def : InstRW<[WriteMicrocoded], (instregex "RDRAND(16|32|64)r")>;
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| D | X86ISelLowering.h | 551 RDRAND, enumerator
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| D | X86.td | 212 "Support RDRAND instruction">;
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| D | X86ScheduleZnver1.td | 796 // RDRAND.
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| D | X86SchedHaswell.td | 722 // RDRAND.
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| D | X86InstrInfo.td | 157 def X86rdrand : SDNode<"X86ISD::RDRAND", SDTX86rdrand,
2327 // RDRAND Instruction
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| /external/llvm-project/llvm/lib/Target/X86/ |
| D | X86IntrinsicsInfo.h | 24 GATHER, SCATTER, PREFETCH, RDSEED, RDRAND, RDPMC, RDTSC, XTEST, XGETBV, ADX, FPCLASSS, enumerator
311 X86_INTRINSIC_DATA(rdrand_16, RDRAND, X86ISD::RDRAND, 0),
312 X86_INTRINSIC_DATA(rdrand_32, RDRAND, X86ISD::RDRAND, 0),
313 X86_INTRINSIC_DATA(rdrand_64, RDRAND, X86ISD::RDRAND, 0),
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| D | X86ISelLowering.h | 649 RDRAND, enumerator
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| D | X86ScheduleZnver2.td | 808 // RDRAND.
809 def : InstRW<[WriteMicrocoded], (instregex "RDRAND(16|32|64)r")>;
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| D | X86.td | 218 "Support RDRAND instruction">;
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| D | X86ScheduleZnver1.td | 799 // RDRAND.
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| D | X86SchedHaswell.td | 725 // RDRAND.
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| /external/llvm/lib/Target/X86/ |
| D | X86IntrinsicsInfo.h | 24 GATHER, SCATTER, PREFETCH, RDSEED, RDRAND, RDPMC, RDTSC, XTEST, ADX, FPCLASS, FPCLASSS, enumerator
220 X86_INTRINSIC_DATA(rdrand_16, RDRAND, X86ISD::RDRAND, 0),
221 X86_INTRINSIC_DATA(rdrand_32, RDRAND, X86ISD::RDRAND, 0),
222 X86_INTRINSIC_DATA(rdrand_64, RDRAND, X86ISD::RDRAND, 0),
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| D | X86ISelLowering.h | 526 RDRAND, enumerator
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| D | X86.td | 174 "Support RDRAND instruction">;
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| D | X86SchedHaswell.td | 1061 // RDRAND.
1066 def : InstRW<[WriteRDRAND], (instregex "RDRAND(16|32|64)r")>;
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| D | X86InstrInfo.td | 147 def X86rdrand : SDNode<"X86ISD::RDRAND", SDTX86rdrand,
2113 // RDRAND Instruction
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| /external/boringssl/src/crypto/fipsmodule/ |
| D | FIPS.md | 48 …is seeded from one of the following entropy sources in preference order: RDRAND (on Intel chips), …
52 In the case that the seed is taken from RDRAND, getrandom will also be queried with `GRND_NONBLOCK`…
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| /external/clang/include/clang/Basic/ |
| D | BuiltinsX86.def | 615 // RDRAND
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