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Searched refs:REG_MASK (Results 1 – 16 of 16) sorted by relevance

/external/pcre/dist2/src/sljit/
DsljitNativeX86_64.c439 if (b & REG_MASK) in emit_x86_instruction()
444 else if (reg_lmap[b & REG_MASK] == 4) in emit_x86_instruction()
448 if ((b & REG_MASK) == SLJIT_UNUSED) in emit_x86_instruction()
451 if (reg_map[b & REG_MASK] >= 8) in emit_x86_instruction()
461 else if (reg_lmap[b & REG_MASK] == 5) in emit_x86_instruction()
553 else if ((b & REG_MASK) != SLJIT_UNUSED) { in emit_x86_instruction()
555 if (immb != 0 || reg_lmap[b & REG_MASK] == 5) { in emit_x86_instruction()
563 *buf_ptr++ |= reg_lmap[b & REG_MASK]; in emit_x86_instruction()
566 *buf_ptr++ = reg_lmap[b & REG_MASK] | (reg_lmap[OFFS_REG(b)] << 3); in emit_x86_instruction()
569 if (immb != 0 || reg_lmap[b & REG_MASK] == 5) { in emit_x86_instruction()
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DsljitNativeX86_32.c371 SLJIT_ASSERT(!(b & SLJIT_MEM) || immb || reg_map[b & REG_MASK] != 5); in emit_x86_instruction()
384 if ((b & REG_MASK) == SLJIT_UNUSED) in emit_x86_instruction()
394 if ((b & REG_MASK) == SLJIT_SP && !(b & OFFS_REG_MASK)) in emit_x86_instruction()
465 else if ((b & REG_MASK) != SLJIT_UNUSED) { in emit_x86_instruction()
475 *buf_ptr++ |= reg_map[b & REG_MASK]; in emit_x86_instruction()
478 *buf_ptr++ = reg_map[b & REG_MASK] | (reg_map[OFFS_REG(b)] << 3); in emit_x86_instruction()
492 *buf_ptr++ = reg_map[b & REG_MASK] | (reg_map[OFFS_REG(b)] << 3) | (immb << 6); in emit_x86_instruction()
792 if ((src & REG_MASK) == SLJIT_R2 || OFFS_REG(src) == SLJIT_R2) { in sljit_emit_icall()
794 if (((src & REG_MASK) | 0x2) == SLJIT_R2) in sljit_emit_icall()
DsljitNativeS390X.c1030 if (mem & REG_MASK) in make_addr_bxy()
1031 base = gpr(mem & REG_MASK); in make_addr_bxy()
1063 if (mem & REG_MASK) in make_addr_bx()
1064 base = gpr(mem & REG_MASK); in make_addr_bx()
1785 dst_r = SLOW_IS_REG(dst) ? gpr(REG_MASK & dst) : tmp0; in sljit_emit_op1()
1786 src_r = FAST_IS_REG(src) ? gpr(REG_MASK & src) : tmp0; in sljit_emit_op1()
1958 sljit_gpr dst_r = SLOW_IS_REG(dst) ? gpr(dst & REG_MASK) : tmp0; in sljit_emit_op2()
1977 if (FAST_IS_REG(src2) && gpr(src2 & REG_MASK) == dst_r) { in sljit_emit_op2()
1989 sljit_gpr src1_r = FAST_IS_REG(src1) ? gpr(src1 & REG_MASK) : tmp0; in sljit_emit_op2()
2017 sljit_gpr src2_r = FAST_IS_REG(src2) ? gpr(src2 & REG_MASK) : tmp1; in sljit_emit_op2()
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DsljitLir.c123 #define REG_MASK 0x3f macro
124 #define OFFS_REG(reg) (((reg) >> 8) & REG_MASK)
125 #define OFFS_REG_MASK (REG_MASK << 8)
128 #define FAST_IS_REG(reg) ((reg) <= REG_MASK)
130 #define SLOW_IS_REG(reg) ((reg) > 0 && (reg) <= REG_MASK)
742 (((exp) & SLJIT_MEM) && (((exp) & REG_MASK) == reg || OFFS_REG(exp) == reg))
768 if (!((p & REG_MASK) == SLJIT_UNUSED || FUNCTION_CHECK_IS_REG(p & REG_MASK))) in function_check_src_mem()
771 if (CHECK_IF_VIRTUAL_REGISTER(p & REG_MASK)) in function_check_src_mem()
775 if ((p & REG_MASK) == SLJIT_UNUSED) in function_check_src_mem()
788 return (p & ~(SLJIT_MEM | REG_MASK | OFFS_REG_MASK)) == 0; in function_check_src_mem()
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DsljitNativePPC_common.c1016 …return push_inst(compiler, INST_CODE_AND_DST(inst, inp_flags, reg) | A(arg & REG_MASK) | B(offs_re… in emit_op_mem()
1020 arg &= REG_MASK; in emit_op_mem()
1177 if (srcw == 0 && (src & REG_MASK) != SLJIT_UNUSED) in emit_prefetch()
1178 return push_inst(compiler, DCBT | A(0) | B(src & REG_MASK)); in emit_prefetch()
1182 return push_inst(compiler, DCBT | A(src & REG_MASK) | B(TMP_REG1)); in emit_prefetch()
1188 return push_inst(compiler, DCBT | A(src & REG_MASK) | B(OFFS_REG(src))); in emit_prefetch()
1195 return push_inst(compiler, DCBT | A(src & REG_MASK) | B(TMP_REG1)); in emit_prefetch()
1658 if ((dst & REG_MASK) && !dstw) { in sljit_emit_fop1_conv_sw_from_f64()
1659 dstw = dst & REG_MASK; in sljit_emit_fop1_conv_sw_from_f64()
1669 return push_inst(compiler, STFIWX | FS(TMP_FREG1) | A(dst & REG_MASK) | B(dstw)); in sljit_emit_fop1_conv_sw_from_f64()
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DsljitNativeARM_T2_32.c974 SLJIT_ASSERT((arg & REG_MASK) != tmp_reg); in emit_op_mem()
977 if (SLJIT_UNLIKELY(!(arg & REG_MASK))) { in emit_op_mem()
1544 …FAIL_IF(push_inst32(compiler, ADD_W | RD4(TMP_REG1) | RN4(arg & REG_MASK) | RM4(OFFS_REG(arg)) | (… in emit_fop_mem()
1549 if ((arg & REG_MASK) && (argw & 0x3) == 0) { in emit_fop_mem()
1551 return push_inst32(compiler, inst | 0x800000 | RN4(arg & REG_MASK) | DD4(reg) | (argw >> 2)); in emit_fop_mem()
1553 return push_inst32(compiler, inst | RN4(arg & REG_MASK) | DD4(reg) | (-argw >> 2)); in emit_fop_mem()
1556 if (arg & REG_MASK) { in emit_fop_mem()
1557 if (emit_set_delta(compiler, TMP_REG1, arg & REG_MASK, argw) != SLJIT_ERR_UNSUPPORTED) { in emit_fop_mem()
1563 FAIL_IF(push_inst32(compiler, ADD_WI | RD4(TMP_REG1) | RN4(arg & REG_MASK) | imm)); in emit_fop_mem()
1569 FAIL_IF(push_inst32(compiler, SUB_WI | RD4(TMP_REG1) | RN4(arg & REG_MASK) | imm)); in emit_fop_mem()
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DsljitNativeARM_32.c1451 SLJIT_ASSERT((arg & REG_MASK) != tmp_reg); in emit_op_mem()
1453 if ((arg & REG_MASK) == SLJIT_UNUSED) { in emit_op_mem()
1469 arg &= REG_MASK; in emit_op_mem()
1482 arg &= REG_MASK; in emit_op_mem()
1931 …FAIL_IF(push_inst(compiler, ADD | RD(TMP_REG2) | RN(arg & REG_MASK) | RM(OFFS_REG(arg)) | ((argw &… in emit_fop_mem()
1939 return push_inst(compiler, EMIT_FPU_DATA_TRANSFER(inst, 1, arg & REG_MASK, reg, argw >> 2)); in emit_fop_mem()
1941 return push_inst(compiler, EMIT_FPU_DATA_TRANSFER(inst, 0, arg & REG_MASK, reg, (-argw) >> 2)); in emit_fop_mem()
1945 FAIL_IF(push_inst(compiler, ADD | RD(TMP_REG2) | RN(arg & REG_MASK) | imm)); in emit_fop_mem()
1951 FAIL_IF(push_inst(compiler, SUB | RD(TMP_REG2) | RN(arg & REG_MASK) | imm)); in emit_fop_mem()
1958 FAIL_IF(push_inst(compiler, ADD | RD(TMP_REG2) | RN(arg & REG_MASK) | RM(TMP_REG2))); in emit_fop_mem()
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DsljitNativeARM_64.c868 | RN(arg & REG_MASK) | RM(OFFS_REG(arg)) | (argw ? (1 << 12) : 0)); in emit_op_mem()
870 …FAIL_IF(push_inst(compiler, ADD | RD(tmp_reg) | RN(arg & REG_MASK) | RM(OFFS_REG(arg)) | (argw << … in emit_op_mem()
874 arg &= REG_MASK; in emit_op_mem()
1387 | RN(arg & REG_MASK) | RM(OFFS_REG(arg)) | (argw ? (1 << 12) : 0)); in emit_fop_mem()
1389 …FAIL_IF(push_inst(compiler, ADD | RD(TMP_REG1) | RN(arg & REG_MASK) | RM(OFFS_REG(arg)) | (argw <<… in emit_fop_mem()
1393 arg &= REG_MASK; in emit_fop_mem()
1910 return push_inst(compiler, inst | RT(reg) | RN(mem & REG_MASK) | ((memw & 0x1ff) << 12)); in sljit_emit_mem()
1939 return push_inst(compiler, inst | VT(freg) | RN(mem & REG_MASK) | ((memw & 0x1ff) << 12)); in sljit_emit_fmem()
DsljitNativeMIPS_common.c923 FAIL_IF(push_inst(compiler, data_transfer_insts[flags & MEM_MASK] | S(arg & REG_MASK) in getput_arg_fast()
974 base = arg & REG_MASK; in getput_arg()
1059 base = arg & REG_MASK; in emit_op_mem()
1308 return push_inst(compiler, PREF | S(src & REG_MASK) | IMM(srcw), MOVABLE_INS); in emit_prefetch()
1311 return push_inst(compiler, PREFX | S(src & REG_MASK) | T(TMP_REG1), MOVABLE_INS); in emit_prefetch()
1318 return push_inst(compiler, PREFX | S(src & REG_MASK) | T(TMP_REG1), MOVABLE_INS); in emit_prefetch()
1321 return push_inst(compiler, PREFX | S(src & REG_MASK) | T(OFFS_REG(src)), MOVABLE_INS); in emit_prefetch()
DsljitNativeSPARC_32.c153 reg = reg_map[*src & REG_MASK]; in call_with_args()
DsljitNativePPC_64.c421 reg = *src & REG_MASK; in call_with_args()
DsljitNativeSPARC_common.c605 | S1(arg & REG_MASK) | ((arg & OFFS_REG_MASK) ? S2(OFFS_REG(arg)) : IMM(argw)), in getput_arg_fast()
646 base = arg & REG_MASK; in getput_arg()
DsljitNativeX86_common.c1182 if ((dst & REG_MASK) == SLJIT_R0) { in emit_mov_byte()
1191 else if ((dst & REG_MASK) == SLJIT_R1) in emit_mov_byte()
/external/mesa3d/src/mesa/drivers/dri/i965/
Dbrw_defines.h53 #define REG_MASK(value) ((value) << 16) macro
1338 # define SLICE_HASHING_TABLE_ENABLE_MASK REG_MASK(1 << 6)
1569 REG_MASK(GEN8_HIZ_NP_PMA_FIX_ENABLE | GEN8_HIZ_NP_EARLY_Z_FAILS_DISABLE)
1577 # define GEN9_SUBSLICE_HASHING_MASK_BITS REG_MASK(3 << 8)
1582 # define GEN9_SLICE_HASHING_MASK_BITS REG_MASK(3 << 11)
1661 # define GLK_SCEC_BARRIER_MODE_MASK REG_MASK(1 << 7)
1666 # define TEXEL_OFFSET_FIX_MASK REG_MASK(1 << 1)
1670 # define HEADERLESS_MESSAGE_FOR_PREEMPTABLE_CONTEXTS_MASK REG_MASK(1 << 5)
1675 # define GEN9_REPLAY_MODE_MASK REG_MASK(1 << 0)
Dbrw_state_upload.c200 REG_MASK(GEN11_DISABLE_REPACKING_FOR_COMPRESSION)); in brw_upload_initial_gpu_state()
208 REG_MASK(GEN9_FLOAT_BLEND_OPTIMIZATION_ENABLE) | in brw_upload_initial_gpu_state()
209 REG_MASK(GEN9_MSC_RAW_HAZARD_AVOIDANCE_BIT) | in brw_upload_initial_gpu_state()
210 REG_MASK(GEN9_PARTIAL_RESOLVE_DISABLE_IN_VC) | in brw_upload_initial_gpu_state()
243 OUT_BATCH(REG_MASK(CSDBG2_CONSTANT_BUFFER_ADDRESS_OFFSET_DISABLE) | in brw_upload_initial_gpu_state()
250 OUT_BATCH(REG_MASK(INSTPM_CONSTANT_BUFFER_ADDRESS_OFFSET_DISABLE) | in brw_upload_initial_gpu_state()
Dgen7_l3_state.c183 OUT_BATCH(REG_MASK(HSW_ROW_CHICKEN3_L3_ATOMIC_DISABLE) | in setup_l3_config()