Searched refs:R_028000_DB_RENDER_CONTROL (Results 1 – 5 of 5) sorted by relevance
| /external/mesa3d/src/amd/common/ |
| D | ac_shadowed_regs.c | 80 R_028000_DB_RENDER_CONTROL,
81 R_028084_TA_BC_BASE_ADDR_HI - R_028000_DB_RENDER_CONTROL + 4,
299 R_028000_DB_RENDER_CONTROL,
300 R_028084_TA_BC_BASE_ADDR_HI - R_028000_DB_RENDER_CONTROL + 4,
627 R_028000_DB_RENDER_CONTROL,
628 R_028084_TA_BC_BASE_ADDR_HI - R_028000_DB_RENDER_CONTROL + 4,
1507 set_context_reg_seq_array(cs, R_028000_DB_RENDER_CONTROL, SET(DbRenderControlGfx9)); in gfx9_emulate_clear_state()
2210 set_context_reg_seq_array(cs, R_028000_DB_RENDER_CONTROL, SET(DbRenderControlNv10)); in gfx10_emulate_clear_state()
2908 set_context_reg_seq_array(cs, R_028000_DB_RENDER_CONTROL, SET(DbRenderControlGfx103)); in gfx103_emulate_clear_state()
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| /external/mesa3d/src/gallium/drivers/r600/ |
| D | evergreend.h | 1885 #define R_028000_DB_RENDER_CONTROL 0x00028000 macro
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| D | evergreen_state.c | 2115 radeon_set_context_reg_seq(cs, R_028000_DB_RENDER_CONTROL, 2); in evergreen_emit_db_misc_state()
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| /external/mesa3d/src/gallium/drivers/radeonsi/ |
| D | si_state.c | 1385 radeon_opt_set_context_reg2(sctx, R_028000_DB_RENDER_CONTROL, SI_TRACKED_DB_RENDER_CONTROL, in si_emit_db_render_state()
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| /external/mesa3d/src/amd/vulkan/ |
| D | radv_pipeline.c | 4041 radeon_set_context_reg(ctx_cs, R_028000_DB_RENDER_CONTROL, db_render_control); in radv_pipeline_generate_depth_stencil_state()
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