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Searched refs:RawbitsToFloat16 (Results 1 – 12 of 12) sorted by relevance

/external/vixl/src/
Dutils-vixl.cc36 const Float16 kFP16DefaultNaN = RawbitsToFloat16(0x7e00);
39 const Float16 kFP16PositiveZero = RawbitsToFloat16(0x0);
40 const Float16 kFP16NegativeZero = RawbitsToFloat16(0x8000);
43 const Float16 kFP16PositiveInfinity = RawbitsToFloat16(0x7c00);
44 const Float16 kFP16NegativeInfinity = RawbitsToFloat16(0xfc00);
74 Float16 RawbitsToFloat16(uint16_t bits) { in RawbitsToFloat16() function
152 return RawbitsToFloat16(bits); in Float16Pack()
216 return RawbitsToFloat16(rawbits_ ^ 0x8000); in operator -()
477 return RawbitsToFloat16(result); in FPToFloat16()
532 return RawbitsToFloat16(result); in FPToFloat16()
Dutils-vixl.h249 friend Float16 RawbitsToFloat16(uint16_t bits);
271 Float16 RawbitsToFloat16(uint16_t bits);
387 return Float16Classify(RawbitsToFloat16(value)); in float16classify()
463 RawbitsToFloat16(Float16ToRawbits(num) | kFP16QuietNaNMask)); in ToQuietNaN()
1304 return RawbitsToFloat16( in FPRoundToFloat16()
1388 return StaticCastFPTo<T>(RawbitsToFloat16(static_cast<uint16_t>(value))); in RawbitsWithSizeToFP()
/external/vixl/test/aarch64/
Dtest-assembler-fp-aarch64.cc338 __ Fmov(h7, RawbitsToFloat16(0x6400U)); in TEST()
341 __ Fmov(h12, RawbitsToFloat16(0x7BFF)); in TEST()
342 __ Fmov(h13, RawbitsToFloat16(0x57F2)); in TEST()
344 __ Fmov(h23, RawbitsToFloat16(0xC500U)); in TEST()
347 __ Fmov(h21, RawbitsToFloat16(0x6404U)); in TEST()
348 __ Fmov(h26, RawbitsToFloat16(0x0U)); in TEST()
349 __ Fmov(h27, RawbitsToFloat16(0x7e00U)); in TEST()
360 ASSERT_EQUAL_FP16(RawbitsToFloat16(0x6400U), h7); in TEST()
363 ASSERT_EQUAL_FP16(RawbitsToFloat16(0x7BFF), h12); in TEST()
364 ASSERT_EQUAL_FP16(RawbitsToFloat16(0x57F2U), h13); in TEST()
[all …]
Dtest-assembler-neon-aarch64.cc3687 __ Fmov(v6.V4H(), RawbitsToFloat16(0x7c2f)); in TEST()
3688 __ Fmov(v7.V8H(), RawbitsToFloat16(0xfe0f)); in TEST()
3729 __ Fmov(v6.V4H(), RawbitsToFloat16(0x7c22)); in TEST()
3730 __ Fmov(v7.V8H(), RawbitsToFloat16(0xfe02)); in TEST()
4881 __ Fmov(h1, RawbitsToFloat16(0xffff)); in TEST()
4894 ASSERT_EQUAL_FP16(RawbitsToFloat16(0xffff), h4); in TEST()
4895 ASSERT_EQUAL_FP16(RawbitsToFloat16(0x0000), h5); in TEST()
4896 ASSERT_EQUAL_FP16(RawbitsToFloat16(0x0000), h6); in TEST()
4897 ASSERT_EQUAL_FP16(RawbitsToFloat16(0x0000), h7); in TEST()
4947 __ Fmov(h1, RawbitsToFloat16(0xffff)); in TEST()
[all …]
Dtest-utils-aarch64.cc48 const Float16 kFP16SignallingNaN = RawbitsToFloat16(0x7c01);
53 const Float16 kFP16QuietNaN = RawbitsToFloat16(0x7e01);
Dtest-utils-aarch64.h145 return RawbitsToFloat16(hreg_bits(code)); in hreg()
Dtest-assembler-sve-aarch64.cc11322 __ Fdup(z0.VnH(), RawbitsToFloat16(0xc500)); in TEST_SVE()
17585 Float16 sa(RawbitsToFloat16(0x7c11)); in TEST_SVE()
17586 Float16 sn(RawbitsToFloat16(0x7c22)); in TEST_SVE()
17587 Float16 sm(RawbitsToFloat16(0x7c33)); in TEST_SVE()
17588 Float16 qa(RawbitsToFloat16(0x7e44)); in TEST_SVE()
17589 Float16 qn(RawbitsToFloat16(0x7e55)); in TEST_SVE()
17590 Float16 qm(RawbitsToFloat16(0x7e66)); in TEST_SVE()
17993 Float16 fp16_sn = RawbitsToFloat16(0x7c22); in TEST_SVE()
17994 Float16 fp16_qn = RawbitsToFloat16(0x7e55); in TEST_SVE()
Dtest-simulator-aarch64.cc172 return FPToDouble(RawbitsToFloat16(bits), kIgnoreDefaultNaN); in rawbits_to_fp()
/external/vixl/src/aarch64/
Dinstructions-aarch64.cc783 return RawbitsToFloat16(result); in Imm8ToFloat16()
Dmacro-assembler-sve-aarch64.cc392 FPToDouble(RawbitsToFloat16(imm.AsUint16()), kIgnoreDefaultNaN); in Cpy()
Dlogic-aarch64.cc5356 SimFloat16 result(OP(SimFloat16(RawbitsToFloat16(src.Uint(vform, 0))), \
5357 SimFloat16(RawbitsToFloat16(src.Uint(vform, 1))))); \
5775 FPToFloat(RawbitsToFloat16(src.Float<uint16_t>(i)), in fcvtl()
5796 FPToFloat(RawbitsToFloat16( in fcvtl2()
Dsimulator-aarch64.h368 *dst = RawbitsToFloat16(rawbits); in ReadLane()
1460 return RawbitsToFloat16(ReadHRegisterBits(code));