| /external/llvm/include/llvm/CodeGen/ |
| D | MachineRegisterInfo.h | 79 MachineOperand *&getRegUseDefListHead(unsigned RegNo) { in getRegUseDefListHead() argument
80 if (TargetRegisterInfo::isVirtualRegister(RegNo)) in getRegUseDefListHead()
81 return VRegInfo[RegNo].second; in getRegUseDefListHead()
82 return PhysRegUseDefLists[RegNo]; in getRegUseDefListHead()
85 MachineOperand *getRegUseDefListHead(unsigned RegNo) const { in getRegUseDefListHead() argument
86 if (TargetRegisterInfo::isVirtualRegister(RegNo)) in getRegUseDefListHead()
87 return VRegInfo[RegNo].second; in getRegUseDefListHead()
88 return PhysRegUseDefLists[RegNo]; in getRegUseDefListHead()
247 reg_iterator reg_begin(unsigned RegNo) const { in reg_begin() argument
248 return reg_iterator(getRegUseDefListHead(RegNo)); in reg_begin()
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| /external/llvm-project/llvm/lib/Target/PowerPC/Disassembler/ |
| D | PPCDisassembler.cpp | 82 static DecodeStatus decodeRegisterClass(MCInst &Inst, uint64_t RegNo, in decodeRegisterClass() argument
84 assert(RegNo < N && "Invalid register number"); in decodeRegisterClass()
85 Inst.addOperand(MCOperand::createReg(Regs[RegNo])); in decodeRegisterClass()
89 static DecodeStatus DecodeCRRCRegisterClass(MCInst &Inst, uint64_t RegNo, in DecodeCRRCRegisterClass() argument
92 return decodeRegisterClass(Inst, RegNo, CRRegs); in DecodeCRRCRegisterClass()
95 static DecodeStatus DecodeCRBITRCRegisterClass(MCInst &Inst, uint64_t RegNo, in DecodeCRBITRCRegisterClass() argument
98 return decodeRegisterClass(Inst, RegNo, CRBITRegs); in DecodeCRBITRCRegisterClass()
101 static DecodeStatus DecodeF4RCRegisterClass(MCInst &Inst, uint64_t RegNo, in DecodeF4RCRegisterClass() argument
104 return decodeRegisterClass(Inst, RegNo, FRegs); in DecodeF4RCRegisterClass()
107 static DecodeStatus DecodeF8RCRegisterClass(MCInst &Inst, uint64_t RegNo, in DecodeF8RCRegisterClass() argument
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/PowerPC/Disassembler/ |
| D | PPCDisassembler.cpp | 75 static DecodeStatus decodeRegisterClass(MCInst &Inst, uint64_t RegNo, in decodeRegisterClass() argument
77 assert(RegNo < N && "Invalid register number"); in decodeRegisterClass()
78 Inst.addOperand(MCOperand::createReg(Regs[RegNo])); in decodeRegisterClass()
82 static DecodeStatus DecodeCRRCRegisterClass(MCInst &Inst, uint64_t RegNo, in DecodeCRRCRegisterClass() argument
85 return decodeRegisterClass(Inst, RegNo, CRRegs); in DecodeCRRCRegisterClass()
88 static DecodeStatus DecodeCRBITRCRegisterClass(MCInst &Inst, uint64_t RegNo, in DecodeCRBITRCRegisterClass() argument
91 return decodeRegisterClass(Inst, RegNo, CRBITRegs); in DecodeCRBITRCRegisterClass()
94 static DecodeStatus DecodeF4RCRegisterClass(MCInst &Inst, uint64_t RegNo, in DecodeF4RCRegisterClass() argument
97 return decodeRegisterClass(Inst, RegNo, FRegs); in DecodeF4RCRegisterClass()
100 static DecodeStatus DecodeF8RCRegisterClass(MCInst &Inst, uint64_t RegNo, in DecodeF8RCRegisterClass() argument
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| /external/swiftshader/third_party/llvm-10.0/llvm/include/llvm/CodeGen/ |
| D | MachineRegisterInfo.h | 110 MachineOperand *&getRegUseDefListHead(Register RegNo) { in getRegUseDefListHead() argument
111 if (RegNo.isVirtual()) in getRegUseDefListHead()
112 return VRegInfo[RegNo.id()].second; in getRegUseDefListHead()
113 return PhysRegUseDefLists[RegNo.id()]; in getRegUseDefListHead()
116 MachineOperand *getRegUseDefListHead(Register RegNo) const { in getRegUseDefListHead() argument
117 if (RegNo.isVirtual()) in getRegUseDefListHead()
118 return VRegInfo[RegNo.id()].second; in getRegUseDefListHead()
119 return PhysRegUseDefLists[RegNo.id()]; in getRegUseDefListHead()
281 reg_iterator reg_begin(unsigned RegNo) const { in reg_begin() argument
282 return reg_iterator(getRegUseDefListHead(RegNo)); in reg_begin()
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| /external/llvm-project/llvm/include/llvm/CodeGen/ |
| D | MachineRegisterInfo.h | 110 MachineOperand *&getRegUseDefListHead(Register RegNo) { in getRegUseDefListHead() argument
111 if (RegNo.isVirtual()) in getRegUseDefListHead()
112 return VRegInfo[RegNo.id()].second; in getRegUseDefListHead()
113 return PhysRegUseDefLists[RegNo.id()]; in getRegUseDefListHead()
116 MachineOperand *getRegUseDefListHead(Register RegNo) const { in getRegUseDefListHead() argument
117 if (RegNo.isVirtual()) in getRegUseDefListHead()
118 return VRegInfo[RegNo.id()].second; in getRegUseDefListHead()
119 return PhysRegUseDefLists[RegNo.id()]; in getRegUseDefListHead()
281 reg_iterator reg_begin(Register RegNo) const { in reg_begin() argument
282 return reg_iterator(getRegUseDefListHead(RegNo)); in reg_begin()
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| /external/llvm-project/llvm/lib/Target/RISCV/Disassembler/ |
| D | RISCVDisassembler.cpp | 61 static DecodeStatus DecodeGPRRegisterClass(MCInst &Inst, uint64_t RegNo, in DecodeGPRRegisterClass() argument
70 if (RegNo >= 32 || (IsRV32E && RegNo >= 16)) in DecodeGPRRegisterClass()
73 MCRegister Reg = RISCV::X0 + RegNo; in DecodeGPRRegisterClass()
78 static DecodeStatus DecodeFPR16RegisterClass(MCInst &Inst, uint64_t RegNo, in DecodeFPR16RegisterClass() argument
81 if (RegNo >= 32) in DecodeFPR16RegisterClass()
84 MCRegister Reg = RISCV::F0_H + RegNo; in DecodeFPR16RegisterClass()
89 static DecodeStatus DecodeFPR32RegisterClass(MCInst &Inst, uint64_t RegNo, in DecodeFPR32RegisterClass() argument
92 if (RegNo >= 32) in DecodeFPR32RegisterClass()
95 MCRegister Reg = RISCV::F0_F + RegNo; in DecodeFPR32RegisterClass()
100 static DecodeStatus DecodeFPR32CRegisterClass(MCInst &Inst, uint64_t RegNo, in DecodeFPR32CRegisterClass() argument
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| /external/capstone/arch/SystemZ/ |
| D | SystemZDisassembler.c | 39 static DecodeStatus decodeRegisterClass(MCInst *Inst, uint64_t RegNo, const unsigned *Regs) in decodeRegisterClass() argument
42 RegNo = Regs[RegNo]; in decodeRegisterClass()
43 if (RegNo == 0) in decodeRegisterClass()
46 MCOperand_CreateReg0(Inst, (unsigned)RegNo); in decodeRegisterClass()
50 static DecodeStatus DecodeGR32BitRegisterClass(MCInst *Inst, uint64_t RegNo, in DecodeGR32BitRegisterClass() argument
53 return decodeRegisterClass(Inst, RegNo, SystemZMC_GR32Regs); in DecodeGR32BitRegisterClass()
56 static DecodeStatus DecodeGRH32BitRegisterClass(MCInst *Inst, uint64_t RegNo, in DecodeGRH32BitRegisterClass() argument
59 return decodeRegisterClass(Inst, RegNo, SystemZMC_GRH32Regs); in DecodeGRH32BitRegisterClass()
62 static DecodeStatus DecodeGR64BitRegisterClass(MCInst *Inst, uint64_t RegNo, in DecodeGR64BitRegisterClass() argument
65 return decodeRegisterClass(Inst, RegNo, SystemZMC_GR64Regs); in DecodeGR64BitRegisterClass()
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| /external/capstone/arch/Mips/ |
| D | MipsDisassembler.c | 45 unsigned RegNo, uint64_t Address, const MCRegisterInfo *Decoder);
48 unsigned RegNo, uint64_t Address, const MCRegisterInfo *Decoder);
51 unsigned RegNo, uint64_t Address, MCRegisterInfo *Decoder);
54 unsigned RegNo, uint64_t Address, MCRegisterInfo *Decoder);
57 unsigned RegNo, uint64_t Address, MCRegisterInfo *Decoder);
60 unsigned RegNo, uint64_t Address, const MCRegisterInfo *Decoder);
63 unsigned RegNo, uint64_t Address, const MCRegisterInfo *Decoder);
66 unsigned RegNo, uint64_t Address, const MCRegisterInfo *Decoder);
69 unsigned RegNo, uint64_t Address, const MCRegisterInfo *Decoder);
72 unsigned RegNo, uint64_t Address, const MCRegisterInfo *Decoder);
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Hexagon/Disassembler/ |
| D | HexagonDisassembler.cpp | 96 static DecodeStatus DecodeIntRegsRegisterClass(MCInst &Inst, unsigned RegNo,
100 unsigned RegNo,
103 static DecodeStatus DecodeIntRegsLow8RegisterClass(MCInst &Inst, unsigned RegNo,
106 static DecodeStatus DecodeHvxVRRegisterClass(MCInst &Inst, unsigned RegNo,
109 static DecodeStatus DecodeDoubleRegsRegisterClass(MCInst &Inst, unsigned RegNo,
113 DecodeGeneralDoubleLow8RegsRegisterClass(MCInst &Inst, unsigned RegNo,
115 static DecodeStatus DecodeHvxWRRegisterClass(MCInst &Inst, unsigned RegNo,
119 unsigned RegNo,
122 static DecodeStatus DecodePredRegsRegisterClass(MCInst &Inst, unsigned RegNo,
125 static DecodeStatus DecodeHvxQRRegisterClass(MCInst &Inst, unsigned RegNo,
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| /external/llvm-project/llvm/lib/Target/Hexagon/Disassembler/ |
| D | HexagonDisassembler.cpp | 96 static DecodeStatus DecodeIntRegsRegisterClass(MCInst &Inst, unsigned RegNo,
100 unsigned RegNo,
103 static DecodeStatus DecodeIntRegsLow8RegisterClass(MCInst &Inst, unsigned RegNo,
106 static DecodeStatus DecodeHvxVRRegisterClass(MCInst &Inst, unsigned RegNo,
109 static DecodeStatus DecodeDoubleRegsRegisterClass(MCInst &Inst, unsigned RegNo,
113 DecodeGeneralDoubleLow8RegsRegisterClass(MCInst &Inst, unsigned RegNo,
115 static DecodeStatus DecodeHvxWRRegisterClass(MCInst &Inst, unsigned RegNo,
119 unsigned RegNo,
122 static DecodeStatus DecodePredRegsRegisterClass(MCInst &Inst, unsigned RegNo,
125 static DecodeStatus DecodeHvxQRRegisterClass(MCInst &Inst, unsigned RegNo,
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/RISCV/Disassembler/ |
| D | RISCVDisassembler.cpp | 59 static DecodeStatus DecodeGPRRegisterClass(MCInst &Inst, uint64_t RegNo, in DecodeGPRRegisterClass() argument
68 if (RegNo >= 32 || (IsRV32E && RegNo >= 16)) in DecodeGPRRegisterClass()
71 Register Reg = RISCV::X0 + RegNo; in DecodeGPRRegisterClass()
76 static DecodeStatus DecodeFPR32RegisterClass(MCInst &Inst, uint64_t RegNo, in DecodeFPR32RegisterClass() argument
79 if (RegNo >= 32) in DecodeFPR32RegisterClass()
82 Register Reg = RISCV::F0_F + RegNo; in DecodeFPR32RegisterClass()
87 static DecodeStatus DecodeFPR32CRegisterClass(MCInst &Inst, uint64_t RegNo, in DecodeFPR32CRegisterClass() argument
90 if (RegNo >= 8) { in DecodeFPR32CRegisterClass()
93 Register Reg = RISCV::F8_F + RegNo; in DecodeFPR32CRegisterClass()
98 static DecodeStatus DecodeFPR64RegisterClass(MCInst &Inst, uint64_t RegNo, in DecodeFPR64RegisterClass() argument
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| /external/llvm/lib/Target/SystemZ/Disassembler/ |
| D | SystemZDisassembler.cpp | 77 static DecodeStatus decodeRegisterClass(MCInst &Inst, uint64_t RegNo, in decodeRegisterClass() argument
79 assert(RegNo < Size && "Invalid register"); in decodeRegisterClass()
80 RegNo = Regs[RegNo]; in decodeRegisterClass()
81 if (RegNo == 0) in decodeRegisterClass()
83 Inst.addOperand(MCOperand::createReg(RegNo)); in decodeRegisterClass()
87 static DecodeStatus DecodeGR32BitRegisterClass(MCInst &Inst, uint64_t RegNo, in DecodeGR32BitRegisterClass() argument
90 return decodeRegisterClass(Inst, RegNo, SystemZMC::GR32Regs, 16); in DecodeGR32BitRegisterClass()
93 static DecodeStatus DecodeGRH32BitRegisterClass(MCInst &Inst, uint64_t RegNo, in DecodeGRH32BitRegisterClass() argument
96 return decodeRegisterClass(Inst, RegNo, SystemZMC::GRH32Regs, 16); in DecodeGRH32BitRegisterClass()
99 static DecodeStatus DecodeGR64BitRegisterClass(MCInst &Inst, uint64_t RegNo, in DecodeGR64BitRegisterClass() argument
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AArch64/Disassembler/ |
| D | AArch64Disassembler.cpp | 41 unsigned RegNo, uint64_t Address,
44 unsigned RegNo,
47 static DecodeStatus DecodeFPR64RegisterClass(MCInst &Inst, unsigned RegNo,
50 static DecodeStatus DecodeFPR32RegisterClass(MCInst &Inst, unsigned RegNo,
53 static DecodeStatus DecodeFPR16RegisterClass(MCInst &Inst, unsigned RegNo,
56 static DecodeStatus DecodeFPR8RegisterClass(MCInst &Inst, unsigned RegNo,
59 static DecodeStatus DecodeGPR64commonRegisterClass(MCInst &Inst, unsigned RegNo,
62 static DecodeStatus DecodeGPR64RegisterClass(MCInst &Inst, unsigned RegNo,
66 unsigned RegNo, uint64_t Address,
68 static DecodeStatus DecodeGPR32RegisterClass(MCInst &Inst, unsigned RegNo,
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| /external/llvm-project/llvm/lib/Target/SystemZ/Disassembler/ |
| D | SystemZDisassembler.cpp | 82 static DecodeStatus decodeRegisterClass(MCInst &Inst, uint64_t RegNo, in decodeRegisterClass() argument
84 assert(RegNo < Size && "Invalid register"); in decodeRegisterClass()
85 RegNo = Regs[RegNo]; in decodeRegisterClass()
86 if (RegNo == 0) in decodeRegisterClass()
88 Inst.addOperand(MCOperand::createReg(RegNo)); in decodeRegisterClass()
92 static DecodeStatus DecodeGR32BitRegisterClass(MCInst &Inst, uint64_t RegNo, in DecodeGR32BitRegisterClass() argument
95 return decodeRegisterClass(Inst, RegNo, SystemZMC::GR32Regs, 16); in DecodeGR32BitRegisterClass()
98 static DecodeStatus DecodeGRH32BitRegisterClass(MCInst &Inst, uint64_t RegNo, in DecodeGRH32BitRegisterClass() argument
101 return decodeRegisterClass(Inst, RegNo, SystemZMC::GRH32Regs, 16); in DecodeGRH32BitRegisterClass()
104 static DecodeStatus DecodeGR64BitRegisterClass(MCInst &Inst, uint64_t RegNo, in DecodeGR64BitRegisterClass() argument
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/SystemZ/Disassembler/ |
| D | SystemZDisassembler.cpp | 82 static DecodeStatus decodeRegisterClass(MCInst &Inst, uint64_t RegNo, in decodeRegisterClass() argument
84 assert(RegNo < Size && "Invalid register"); in decodeRegisterClass()
85 RegNo = Regs[RegNo]; in decodeRegisterClass()
86 if (RegNo == 0) in decodeRegisterClass()
88 Inst.addOperand(MCOperand::createReg(RegNo)); in decodeRegisterClass()
92 static DecodeStatus DecodeGR32BitRegisterClass(MCInst &Inst, uint64_t RegNo, in DecodeGR32BitRegisterClass() argument
95 return decodeRegisterClass(Inst, RegNo, SystemZMC::GR32Regs, 16); in DecodeGR32BitRegisterClass()
98 static DecodeStatus DecodeGRH32BitRegisterClass(MCInst &Inst, uint64_t RegNo, in DecodeGRH32BitRegisterClass() argument
101 return decodeRegisterClass(Inst, RegNo, SystemZMC::GRH32Regs, 16); in DecodeGRH32BitRegisterClass()
104 static DecodeStatus DecodeGR64BitRegisterClass(MCInst &Inst, uint64_t RegNo, in DecodeGR64BitRegisterClass() argument
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| /external/capstone/arch/PowerPC/ |
| D | PPCDisassembler.c | 166 static DecodeStatus decodeRegisterClass(MCInst *Inst, uint64_t RegNo, in decodeRegisterClass() argument
170 MCOperand_CreateReg0(Inst, Regs[RegNo]); in decodeRegisterClass()
174 static DecodeStatus DecodeCRRCRegisterClass(MCInst *Inst, uint64_t RegNo, in DecodeCRRCRegisterClass() argument
178 return decodeRegisterClass(Inst, RegNo, CRRegs); in DecodeCRRCRegisterClass()
181 static DecodeStatus DecodeCRBITRCRegisterClass(MCInst *Inst, uint64_t RegNo, in DecodeCRBITRCRegisterClass() argument
185 return decodeRegisterClass(Inst, RegNo, CRBITRegs); in DecodeCRBITRCRegisterClass()
188 static DecodeStatus DecodeF4RCRegisterClass(MCInst *Inst, uint64_t RegNo, in DecodeF4RCRegisterClass() argument
192 return decodeRegisterClass(Inst, RegNo, FRegs); in DecodeF4RCRegisterClass()
195 static DecodeStatus DecodeF8RCRegisterClass(MCInst *Inst, uint64_t RegNo, in DecodeF8RCRegisterClass() argument
199 return decodeRegisterClass(Inst, RegNo, FRegs); in DecodeF8RCRegisterClass()
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| /external/llvm-project/llvm/lib/Target/AArch64/Disassembler/ |
| D | AArch64Disassembler.cpp | 41 unsigned RegNo, uint64_t Address,
44 unsigned RegNo,
47 static DecodeStatus DecodeFPR64RegisterClass(MCInst &Inst, unsigned RegNo,
50 static DecodeStatus DecodeFPR32RegisterClass(MCInst &Inst, unsigned RegNo,
53 static DecodeStatus DecodeFPR16RegisterClass(MCInst &Inst, unsigned RegNo,
56 static DecodeStatus DecodeFPR8RegisterClass(MCInst &Inst, unsigned RegNo,
59 static DecodeStatus DecodeGPR64commonRegisterClass(MCInst &Inst, unsigned RegNo,
62 static DecodeStatus DecodeGPR64RegisterClass(MCInst &Inst, unsigned RegNo,
66 unsigned RegNo, uint64_t Address,
68 static DecodeStatus DecodeGPR32RegisterClass(MCInst &Inst, unsigned RegNo,
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| /external/llvm/lib/Target/Mips/Disassembler/ |
| D | MipsDisassembler.cpp | 72 unsigned RegNo,
77 unsigned RegNo,
82 unsigned RegNo,
87 unsigned RegNo,
92 unsigned RegNo,
97 unsigned RegNo,
107 unsigned RegNo,
112 unsigned RegNo,
117 unsigned RegNo,
122 unsigned RegNo,
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| /external/capstone/arch/AArch64/ |
| D | AArch64Disassembler.c | 42 unsigned RegNo, uint64_t Address,
45 unsigned RegNo,
48 static DecodeStatus DecodeFPR64RegisterClass(MCInst *Inst, unsigned RegNo,
51 static DecodeStatus DecodeFPR32RegisterClass(MCInst *Inst, unsigned RegNo,
54 static DecodeStatus DecodeFPR16RegisterClass(MCInst *Inst, unsigned RegNo,
57 static DecodeStatus DecodeFPR8RegisterClass(MCInst *Inst, unsigned RegNo,
60 static DecodeStatus DecodeGPR64RegisterClass(MCInst *Inst, unsigned RegNo,
64 unsigned RegNo, uint64_t Address,
66 static DecodeStatus DecodeGPR32RegisterClass(MCInst *Inst, unsigned RegNo,
70 unsigned RegNo, uint64_t Address,
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| /external/llvm/lib/Target/X86/MCTargetDesc/ |
| D | X86BaseInfo.h | 725 inline bool isX86_64ExtendedReg(unsigned RegNo) { in isX86_64ExtendedReg() argument
726 if ((RegNo >= X86::XMM8 && RegNo <= X86::XMM15) || in isX86_64ExtendedReg()
727 (RegNo >= X86::XMM24 && RegNo <= X86::XMM31) || in isX86_64ExtendedReg()
728 (RegNo >= X86::YMM8 && RegNo <= X86::YMM15) || in isX86_64ExtendedReg()
729 (RegNo >= X86::YMM24 && RegNo <= X86::YMM31) || in isX86_64ExtendedReg()
730 (RegNo >= X86::ZMM8 && RegNo <= X86::ZMM15) || in isX86_64ExtendedReg()
731 (RegNo >= X86::ZMM24 && RegNo <= X86::ZMM31)) in isX86_64ExtendedReg()
734 switch (RegNo) { in isX86_64ExtendedReg()
753 static inline bool is32ExtendedReg(unsigned RegNo) { in is32ExtendedReg() argument
754 return ((RegNo >= X86::XMM16 && RegNo <= X86::XMM31) || in is32ExtendedReg()
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| /external/llvm/lib/Target/Sparc/AsmParser/ |
| D | SparcAsmParser.cpp | 53 bool ParseRegister(unsigned &RegNo, SMLoc &StartLoc, SMLoc &EndLoc) override;
77 bool matchRegisterName(const AsmToken &Tok, unsigned &RegNo,
593 ParseRegister(unsigned &RegNo, SMLoc &StartLoc, SMLoc &EndLoc) in ParseRegister() argument
598 RegNo = 0; in ParseRegister()
603 if (matchRegisterName(Tok, RegNo, regKind)) { in ParseRegister()
781 unsigned RegNo, RegKind; in parseOperand() local
782 if (!matchRegisterName(Parser.getTok(), RegNo, RegKind)) in parseOperand()
787 Operands.push_back(SparcOperand::CreateReg(RegNo, RegKind, S, E)); in parseOperand()
840 unsigned RegNo; in parseSparcAsmOperand() local
842 if (matchRegisterName(Parser.getTok(), RegNo, RegKind)) { in parseSparcAsmOperand()
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| /external/llvm-project/llvm/lib/Target/Sparc/AsmParser/ |
| D | SparcAsmParser.cpp | 70 bool ParseRegister(unsigned &RegNo, SMLoc &StartLoc, SMLoc &EndLoc) override;
71 OperandMatchResultTy tryParseRegister(unsigned &RegNo, SMLoc &StartLoc,
98 bool matchRegisterName(const AsmToken &Tok, unsigned &RegNo,
633 bool SparcAsmParser::ParseRegister(unsigned &RegNo, SMLoc &StartLoc, in ParseRegister() argument
635 if (tryParseRegister(RegNo, StartLoc, EndLoc) != MatchOperand_Success) in ParseRegister()
640 OperandMatchResultTy SparcAsmParser::tryParseRegister(unsigned &RegNo, in tryParseRegister() argument
646 RegNo = 0; in tryParseRegister()
651 if (matchRegisterName(Tok, RegNo, regKind)) { in tryParseRegister()
835 unsigned RegNo, RegKind; in parseOperand() local
836 if (!matchRegisterName(Parser.getTok(), RegNo, RegKind)) in parseOperand()
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/X86/MCTargetDesc/ |
| D | X86MCExpr.h | 28 const int64_t RegNo; // All
30 explicit X86MCExpr(int64_t R) : RegNo(R) {} in X86MCExpr()
36 static const X86MCExpr *create(int64_t RegNo, MCContext &Ctx) { in create() argument
37 return new (Ctx) X86MCExpr(RegNo); in create()
45 int64_t getRegNo() const { return RegNo; } in getRegNo()
52 OS << X86ATTInstPrinter::getRegisterName(RegNo); in printImpl()
|
| /external/llvm-project/llvm/lib/Target/X86/MCTargetDesc/ |
| D | X86MCExpr.h | 28 const int64_t RegNo; // All
30 explicit X86MCExpr(int64_t R) : RegNo(R) {} in X86MCExpr()
36 static const X86MCExpr *create(int64_t RegNo, MCContext &Ctx) { in create() argument
37 return new (Ctx) X86MCExpr(RegNo); in create()
45 int64_t getRegNo() const { return RegNo; } in getRegNo()
52 OS << X86ATTInstPrinter::getRegisterName(RegNo); in printImpl()
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| /external/llvm/lib/Target/Sparc/Disassembler/ |
| D | SparcDisassembler.cpp | 153 unsigned RegNo, in DecodeIntRegsRegisterClass() argument
156 if (RegNo > 31) in DecodeIntRegsRegisterClass()
158 unsigned Reg = IntRegDecoderTable[RegNo]; in DecodeIntRegsRegisterClass()
164 unsigned RegNo, in DecodeI64RegsRegisterClass() argument
167 if (RegNo > 31) in DecodeI64RegsRegisterClass()
169 unsigned Reg = IntRegDecoderTable[RegNo]; in DecodeI64RegsRegisterClass()
176 unsigned RegNo, in DecodeFPRegsRegisterClass() argument
179 if (RegNo > 31) in DecodeFPRegsRegisterClass()
181 unsigned Reg = FPRegDecoderTable[RegNo]; in DecodeFPRegsRegisterClass()
188 unsigned RegNo, in DecodeDFPRegsRegisterClass() argument
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