| /external/capstone/arch/TMS320C64x/ |
| D | TMS320C64xDisassembler.c | 430 if((op->RegVal >= TMS320C64X_REG_A0) && (op->RegVal <= TMS320C64X_REG_A31)) in DecodeSide()
431 op->RegVal = (op->RegVal - TMS320C64X_REG_A0 + TMS320C64X_REG_B0); in DecodeSide()
432 else if((op->RegVal >= TMS320C64X_REG_B0) && (op->RegVal <= TMS320C64X_REG_B31)) in DecodeSide()
433 op->RegVal = (op->RegVal - TMS320C64X_REG_B0 + TMS320C64X_REG_A0); in DecodeSide()
498 if((op->RegVal >= TMS320C64X_REG_A0) && (op->RegVal <= TMS320C64X_REG_A31)) in DecodeCrosspathX1()
499 op->RegVal = (op->RegVal - TMS320C64X_REG_A0 + TMS320C64X_REG_B0); in DecodeCrosspathX1()
500 else if((op->RegVal >= TMS320C64X_REG_B0) && (op->RegVal <= TMS320C64X_REG_B31)) in DecodeCrosspathX1()
501 op->RegVal = (op->RegVal - TMS320C64X_REG_B0 + TMS320C64X_REG_A0); in DecodeCrosspathX1()
530 if((op->RegVal >= TMS320C64X_REG_A0) && (op->RegVal <= TMS320C64X_REG_A31)) in DecodeCrosspathX2()
531 op->RegVal = (op->RegVal - TMS320C64X_REG_A0 + TMS320C64X_REG_B0); in DecodeCrosspathX2()
[all …]
|
| /external/capstone/ |
| D | MCInst.c | 117 return op->RegVal; in MCOperand_getReg()
123 op->RegVal = Reg; in MCOperand_setReg()
151 op->RegVal = Reg; in MCOperand_CreateReg1()
162 op->RegVal = Reg; in MCOperand_CreateReg0()
|
| D | MCInst.h | 40 unsigned RegVal; member
|
| /external/llvm/include/llvm/MC/ |
| D | MCInst.h | 45 unsigned RegVal; member
65 return RegVal; in getReg()
71 RegVal = Reg; in setReg()
114 Op.RegVal = Reg; in createReg()
|
| /external/swiftshader/third_party/llvm-10.0/llvm/include/llvm/MC/ |
| D | MCInst.h | 46 unsigned RegVal; member
66 return RegVal; in getReg()
72 RegVal = Reg; in setReg()
118 Op.RegVal = Reg; in createReg()
|
| /external/llvm-project/llvm/tools/llvm-exegesis/lib/ |
| D | SnippetFile.cpp | 50 RegisterValue RegVal; in HandleComment() local
60 if (!(RegVal.Register = findRegisterByName(Parts[0].trim()))) { in HandleComment()
67 RegVal.Value = APInt( in HandleComment()
69 Result->Key.RegisterInitialValues.push_back(std::move(RegVal)); in HandleComment()
|
| /external/llvm-project/llvm/include/llvm/MC/ |
| D | MCInst.h | 46 unsigned RegVal; member
66 return RegVal; in getReg()
72 RegVal = Reg; in setReg()
118 Op.RegVal = Reg; in createReg()
|
| /external/llvm-project/lldb/unittests/tools/lldb-server/tests/ |
| D | MessageObjects.cpp | 369 const RegisterValue &RegVal) { in operator <<() argument
370 ArrayRef<uint8_t> Bytes(static_cast<const uint8_t *>(RegVal.GetBytes()), in operator <<()
371 RegVal.GetByteSize()); in operator <<()
372 return OS << formatv("RegisterValue[{0}]: {1:@[x-2]}", RegVal.GetByteSize(), in operator <<()
|
| D | MessageObjects.h | 183 std::ostream &operator<<(std::ostream &OS, const RegisterValue &RegVal);
|
| /external/llvm-project/llvm/unittests/Analysis/ |
| D | SparsePropagation.cpp | 206 auto RegVal = TestLatticeKey(I.getValueOperand(), IPOGrouping::Register); in visitStore() local
209 MergeValues(SS.getValueState(RegVal), SS.getValueState(MemPtr)); in visitStore()
|
| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AMDGPU/ |
| D | AMDGPUTargetMachine.cpp | 1025 auto parseRegister = [&](const yaml::StringValue &RegName, unsigned &RegVal) { in parseMachineFunctionInfo() argument
1026 if (parseNamedRegisterReference(PFS, RegVal, RegName.Value, Error)) { in parseMachineFunctionInfo()
|
| /external/llvm-project/llvm/lib/Target/AMDGPU/ |
| D | AMDGPUTargetMachine.cpp | 1101 auto parseRegister = [&](const yaml::StringValue &RegName, Register &RegVal) { in parseMachineFunctionInfo() argument
1107 RegVal = TempReg; in parseMachineFunctionInfo()
|
| /external/llvm/lib/Target/X86/ |
| D | X86ISelLowering.cpp | 2841 SDValue RegVal = DAG.getCopyFromReg(Chain, dl, F.VReg, F.VT); in LowerFormalArguments() local
2843 Chain = DAG.getCopyToReg(Chain, dl, F.VReg, RegVal); in LowerFormalArguments()
|
| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/X86/ |
| D | X86ISelLowering.cpp | 3654 SDValue RegVal = DAG.getCopyFromReg(Chain, dl, FR.VReg, FR.VT); in LowerFormalArguments() local
3656 Chain = DAG.getCopyToReg(Chain, dl, FR.VReg, RegVal); in LowerFormalArguments()
|
| /external/llvm-project/llvm/lib/Target/X86/ |
| D | X86ISelLowering.cpp | 3552 SDValue RegVal = DAG.getCopyFromReg(Chain, DL, FR.VReg, FR.VT); in forwardMustTailParameters() local
3555 Chain = DAG.getCopyToReg(Chain, DL, FR.VReg, RegVal); in forwardMustTailParameters()
|