Searched refs:ResRegs (Results 1 – 7 of 7) sorted by relevance
/external/llvm-project/llvm/lib/CodeGen/GlobalISel/ |
D | InlineAsmLowering.cpp | 602 ArrayRef<Register> ResRegs = GetOrCreateVRegs(Call); in lowerInlineAsm() local 603 if (ResRegs.size() != OutputOperands.size()) { in lowerInlineAsm() 608 for (unsigned int i = 0, e = ResRegs.size(); i < e; i++) { in lowerInlineAsm() 625 if (MRI->getType(ResRegs[i]).getSizeInBits() < SrcSize) { in lowerInlineAsm() 632 MIRBuilder.buildTrunc(ResRegs[i], Tmp1Reg); in lowerInlineAsm() 634 MIRBuilder.buildCopy(ResRegs[i], SrcReg); in lowerInlineAsm()
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D | CallLowering.cpp | 79 ArrayRef<Register> ResRegs, in lowerCall() argument 119 Info.OrigRet = ArgInfo{ResRegs, CB.getType(), ISD::ArgFlagsTy{}}; in lowerCall()
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D | IRTranslator.cpp | 1410 ArrayRef<Register> ResRegs = getOrCreateVRegs(U); in translateSelect() local 1418 for (unsigned i = 0; i < ResRegs.size(); ++i) { in translateSelect() 1419 MIRBuilder.buildSelect(ResRegs[i], Tst, Op0Regs[i], Op1Regs[i], Flags); in translateSelect() 1635 ArrayRef<Register> ResRegs = getOrCreateVRegs(CI); in translateOverflowIntrinsic() local 1637 Op, {ResRegs[0], ResRegs[1]}, in translateOverflowIntrinsic() 2453 ArrayRef<Register> ResRegs = getOrCreateVRegs(LP); in translateLandingPad() local 2454 MIRBuilder.buildCopy(ResRegs[0], ExceptionReg); in translateLandingPad() 2463 MIRBuilder.buildCast(ResRegs[1], PtrVReg); in translateLandingPad()
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/external/swiftshader/third_party/llvm-10.0/llvm/include/llvm/CodeGen/GlobalISel/ |
D | CallLowering.h | 332 ArrayRef<Register> ResRegs,
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/external/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/GlobalISel/ |
D | IRTranslator.cpp | 1009 ArrayRef<Register> ResRegs = getOrCreateVRegs(U); in translateSelect() local 1018 for (unsigned i = 0; i < ResRegs.size(); ++i) { in translateSelect() 1019 MIRBuilder.buildInstr(TargetOpcode::G_SELECT, {ResRegs[i]}, in translateSelect() 1193 ArrayRef<Register> ResRegs = getOrCreateVRegs(CI); in translateOverflowIntrinsic() local 1195 .addDef(ResRegs[0]) in translateOverflowIntrinsic() 1196 .addDef(ResRegs[1]) in translateOverflowIntrinsic() 1786 ArrayRef<Register> ResRegs = getOrCreateVRegs(LP); in translateLandingPad() local 1787 MIRBuilder.buildCopy(ResRegs[0], ExceptionReg); in translateLandingPad() 1796 MIRBuilder.buildCast(ResRegs[1], PtrVReg); in translateLandingPad()
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D | CallLowering.cpp | 33 ArrayRef<Register> ResRegs, in lowerCall() argument 58 Info.OrigRet = ArgInfo{ResRegs, CS.getType(), ISD::ArgFlagsTy{}}; in lowerCall()
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/external/llvm-project/llvm/include/llvm/CodeGen/GlobalISel/ |
D | CallLowering.h | 373 ArrayRef<Register> ResRegs,
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