/external/llvm-project/llvm/lib/CodeGen/ |
D | ValueTypes.cpp | 43 EVT ResultVT; in getExtendedVectorVT() local 44 ResultVT.LLVMTy = in getExtendedVectorVT() 46 assert(ResultVT.isExtended() && "Type is not extended!"); in getExtendedVectorVT() 47 return ResultVT; in getExtendedVectorVT() 51 EVT ResultVT; in getExtendedVectorVT() local 52 ResultVT.LLVMTy = VectorType::get(VT.getTypeForEVT(Context), EC); in getExtendedVectorVT() 53 assert(ResultVT.isExtended() && "Type is not extended!"); in getExtendedVectorVT() 54 return ResultVT; in getExtendedVectorVT()
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/external/llvm/lib/IR/ |
D | ValueTypes.cpp | 42 EVT ResultVT; in getExtendedVectorVT() local 43 ResultVT.LLVMTy = VectorType::get(VT.getTypeForEVT(Context), NumElements); in getExtendedVectorVT() 44 assert(ResultVT.isExtended() && "Type is not extended!"); in getExtendedVectorVT() 45 return ResultVT; in getExtendedVectorVT()
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/external/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/ |
D | ValueTypes.cpp | 37 EVT ResultVT; in getExtendedVectorVT() local 38 ResultVT.LLVMTy = VectorType::get(VT.getTypeForEVT(Context), NumElements); in getExtendedVectorVT() 39 assert(ResultVT.isExtended() && "Type is not extended!"); in getExtendedVectorVT() 40 return ResultVT; in getExtendedVectorVT()
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/external/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/SelectionDAG/ |
D | LegalizeTypes.cpp | 235 EVT ResultVT = N->getValueType(i); in run() local 236 LLVM_DEBUG(dbgs() << "Analyzing result type: " << ResultVT.getEVTString() in run() 238 switch (getTypeAction(ResultVT)) { in run()
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D | SelectionDAGBuilder.cpp | 6646 EVT ResultVT = Op1.getValueType(); in visitIntrinsicCall() local 6648 if (ResultVT.isVector()) in visitIntrinsicCall() 6650 *Context, OverflowVT, ResultVT.getVectorNumElements()); in visitIntrinsicCall() 6652 SDVTList VTs = DAG.getVTList(ResultVT, OverflowVT); in visitIntrinsicCall() 8478 EVT ResultVT = TLI.getValueType(DAG.getDataLayout(), *CurResultType); in visitInlineAsm() local 8490 if (ResultVT != V.getValueType() && in visitInlineAsm() 8491 ResultVT.getSizeInBits() == V.getValueSizeInBits()) in visitInlineAsm() 8492 V = DAG.getNode(ISD::BITCAST, getCurSDLoc(), ResultVT, V); in visitInlineAsm() 8493 else if (ResultVT != V.getValueType() && ResultVT.isInteger() && in visitInlineAsm() 8498 V = DAG.getNode(ISD::TRUNCATE, getCurSDLoc(), ResultVT, V); in visitInlineAsm() [all …]
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D | DAGCombiner.cpp | 16942 EVT ResultVT = EVE->getValueType(0); in scalarizeExtractedVectorLoad() local 16951 ISD::LoadExtType ExtTy = ResultVT.bitsGT(VecEltVT) ? in scalarizeExtractedVectorLoad() 16987 if (ResultVT.bitsGT(VecEltVT)) { in scalarizeExtractedVectorLoad() 16990 ISD::LoadExtType ExtType = TLI.isLoadExtLegal(ISD::ZEXTLOAD, ResultVT, in scalarizeExtractedVectorLoad() 16994 Load = DAG.getExtLoad(ExtType, SDLoc(EVE), ResultVT, in scalarizeExtractedVectorLoad() 17004 if (ResultVT.bitsLT(VecEltVT)) in scalarizeExtractedVectorLoad() 17005 Load = DAG.getNode(ISD::TRUNCATE, SDLoc(EVE), ResultVT, Load); in scalarizeExtractedVectorLoad() 17007 Load = DAG.getBitcast(ResultVT, Load); in scalarizeExtractedVectorLoad()
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/external/llvm-project/llvm/lib/CodeGen/SelectionDAG/ |
D | LegalizeTypes.cpp | 241 EVT ResultVT = N->getValueType(i); in run() local 242 LLVM_DEBUG(dbgs() << "Analyzing result type: " << ResultVT.getEVTString() in run() 244 switch (getTypeAction(ResultVT)) { in run()
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D | SelectionDAGBuilder.cpp | 6553 EVT ResultVT = Op1.getValueType(); in visitIntrinsicCall() local 6555 if (ResultVT.isVector()) in visitIntrinsicCall() 6557 *Context, OverflowVT, ResultVT.getVectorNumElements()); in visitIntrinsicCall() 6559 SDVTList VTs = DAG.getVTList(ResultVT, OverflowVT); in visitIntrinsicCall() 6941 EVT ResultVT = TLI.getValueType(DAG.getDataLayout(), I.getType()); in visitIntrinsicCall() local 6942 setValue(&I, DAG.getNode(ISD::INSERT_SUBVECTOR, DL, ResultVT, Vec, SubVec, in visitIntrinsicCall() 6951 EVT ResultVT = TLI.getValueType(DAG.getDataLayout(), I.getType()); in visitIntrinsicCall() local 6953 setValue(&I, DAG.getNode(ISD::EXTRACT_SUBVECTOR, DL, ResultVT, Vec, Index)); in visitIntrinsicCall() 8545 EVT ResultVT = TLI.getValueType(DAG.getDataLayout(), *CurResultType); in visitInlineAsm() local 8557 if (ResultVT != V.getValueType() && in visitInlineAsm() [all …]
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D | DAGCombiner.cpp | 18064 EVT ResultVT = EVE->getValueType(0); in scalarizeExtractedVectorLoad() local 18081 ISD::LoadExtType ExtTy = ResultVT.bitsGT(VecEltVT) ? in scalarizeExtractedVectorLoad() 18117 if (ResultVT.bitsGT(VecEltVT)) { in scalarizeExtractedVectorLoad() 18120 ISD::LoadExtType ExtType = TLI.isLoadExtLegal(ISD::ZEXTLOAD, ResultVT, in scalarizeExtractedVectorLoad() 18124 Load = DAG.getExtLoad(ExtType, SDLoc(EVE), ResultVT, in scalarizeExtractedVectorLoad() 18134 if (ResultVT.bitsLT(VecEltVT)) in scalarizeExtractedVectorLoad() 18135 Load = DAG.getNode(ISD::TRUNCATE, SDLoc(EVE), ResultVT, Load); in scalarizeExtractedVectorLoad() 18137 Load = DAG.getBitcast(ResultVT, Load); in scalarizeExtractedVectorLoad()
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/external/llvm/lib/CodeGen/SelectionDAG/ |
D | LegalizeTypes.cpp | 223 EVT ResultVT = N->getValueType(i); in run() local 224 switch (getTypeAction(ResultVT)) { in run() 245 assert(isLegalInHWReg(ResultVT) && in run()
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D | DAGCombiner.cpp | 12259 EVT ResultVT = EVE->getValueType(0); in ReplaceExtractVectorEltOfLoadWithNarrowedLoad() local 12297 if (ResultVT.bitsGT(VecEltVT)) { in ReplaceExtractVectorEltOfLoadWithNarrowedLoad() 12300 ISD::LoadExtType ExtType = TLI.isLoadExtLegal(ISD::ZEXTLOAD, ResultVT, in ReplaceExtractVectorEltOfLoadWithNarrowedLoad() 12305 ExtType, SDLoc(EVE), ResultVT, OriginalLoad->getChain(), NewPtr, MPI, in ReplaceExtractVectorEltOfLoadWithNarrowedLoad() 12315 if (ResultVT.bitsLT(VecEltVT)) in ReplaceExtractVectorEltOfLoadWithNarrowedLoad() 12316 Load = DAG.getNode(ISD::TRUNCATE, SDLoc(EVE), ResultVT, Load); in ReplaceExtractVectorEltOfLoadWithNarrowedLoad() 12318 Load = DAG.getBitcast(ResultVT, Load); in ReplaceExtractVectorEltOfLoadWithNarrowedLoad()
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/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AMDGPU/ |
D | SIISelLowering.cpp | 4884 EVT ResultVT = Op.getValueType(); in lowerEXTRACT_VECTOR_ELT() local 4913 if (ResultVT == MVT::f16) { in lowerEXTRACT_VECTOR_ELT() 4915 return DAG.getNode(ISD::BITCAST, SL, ResultVT, Result); in lowerEXTRACT_VECTOR_ELT() 4918 return DAG.getAnyExtOrTrunc(Elt, SL, ResultVT); in lowerEXTRACT_VECTOR_ELT() 4929 EVT ResultVT = Op.getValueType(); in lowerVECTOR_SHUFFLE() local 4932 EVT PackVT = ResultVT.isInteger() ? MVT::v2i16 : MVT::v2f16; in lowerVECTOR_SHUFFLE() 4947 for (int I = 0, N = ResultVT.getVectorNumElements(); I != N; I += 2) { in lowerVECTOR_SHUFFLE() 4975 return DAG.getNode(ISD::CONCAT_VECTORS, SL, ResultVT, Pieces); in lowerVECTOR_SHUFFLE() 10236 MVT ResultVT = NewChannels == 1 ? in adjustWritemask() local 10240 DAG.getVTList(ResultVT, MVT::Other) : DAG.getVTList(ResultVT); in adjustWritemask()
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/external/llvm-project/llvm/lib/Target/AMDGPU/ |
D | SIISelLowering.cpp | 5471 EVT ResultVT = Op.getValueType(); in lowerEXTRACT_VECTOR_ELT() local 5500 if (ResultVT == MVT::f16) { in lowerEXTRACT_VECTOR_ELT() 5502 return DAG.getNode(ISD::BITCAST, SL, ResultVT, Result); in lowerEXTRACT_VECTOR_ELT() 5505 return DAG.getAnyExtOrTrunc(Elt, SL, ResultVT); in lowerEXTRACT_VECTOR_ELT() 5516 EVT ResultVT = Op.getValueType(); in lowerVECTOR_SHUFFLE() local 5519 EVT PackVT = ResultVT.isInteger() ? MVT::v2i16 : MVT::v2f16; in lowerVECTOR_SHUFFLE() 5534 for (int I = 0, N = ResultVT.getVectorNumElements(); I != N; I += 2) { in lowerVECTOR_SHUFFLE() 5562 return DAG.getNode(ISD::CONCAT_VECTORS, SL, ResultVT, Pieces); in lowerVECTOR_SHUFFLE() 10980 MVT ResultVT = NewChannels == 1 ? in adjustWritemask() local 10984 DAG.getVTList(ResultVT, MVT::Other) : DAG.getVTList(ResultVT); in adjustWritemask()
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/external/llvm/lib/Target/X86/ |
D | X86ISelLowering.cpp | 4423 EVT ResultVT = EVT::getVectorVT(*DAG.getContext(), ElVT, in extractSubVector() local 4428 return DAG.getUNDEF(ResultVT); in extractSubVector() 4441 dl, ResultVT, makeArrayRef(Vec->op_begin() + IdxVal, ElemsPerChunk)); in extractSubVector() 4444 return DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, ResultVT, Vec, VecIdx); in extractSubVector() 4477 EVT ResultVT = Result.getValueType(); in insertSubVector() local 4488 return DAG.getNode(ISD::INSERT_SUBVECTOR, dl, ResultVT, Result, Vec, VecIdx); in insertSubVector() 4508 EVT ResultVT = Result.getValueType(); in insert128BitVector() local 4510 SDValue Undef = DAG.getUNDEF(ResultVT); in insert128BitVector() 4511 SDValue Vec256 = DAG.getNode(ISD::INSERT_SUBVECTOR, dl, ResultVT, Undef, in insert128BitVector() 4515 MVT ScalarType = ResultVT.getVectorElementType().getSimpleVT(); in insert128BitVector() [all …]
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/external/llvm/lib/Target/AArch64/ |
D | AArch64FastISel.cpp | 184 unsigned emitLoad(MVT VT, MVT ResultVT, Address Addr, bool WantZExt = true,
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/external/llvm-project/llvm/lib/Target/AArch64/ |
D | AArch64FastISel.cpp | 227 unsigned emitLoad(MVT VT, MVT ResultVT, Address Addr, bool WantZExt = true,
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/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AArch64/ |
D | AArch64FastISel.cpp | 227 unsigned emitLoad(MVT VT, MVT ResultVT, Address Addr, bool WantZExt = true,
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/external/llvm-project/llvm/lib/Target/X86/ |
D | X86ISelLowering.cpp | 5815 EVT ResultVT = EVT::getVectorVT(*DAG.getContext(), ElVT, in extractSubVector() local 5828 return DAG.getBuildVector(ResultVT, dl, in extractSubVector() 5832 return DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, ResultVT, Vec, VecIdx); in extractSubVector() 5865 EVT ResultVT = Result.getValueType(); in insertSubVector() local 5876 return DAG.getNode(ISD::INSERT_SUBVECTOR, dl, ResultVT, Result, Vec, VecIdx); in insertSubVector() 19463 MVT ResultVT = Op0.getSimpleValueType(); in LowerFunnelShift() local 19467 DAG.getNode(IsFSHR ? X86ISD::VSHRD : X86ISD::VSHLD, DL, ResultVT, Op0, in LowerFunnelShift() 19473 ResultVT, Op0, Op1, Amt); in LowerFunnelShift()
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/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/X86/ |
D | X86ISelLowering.cpp | 5624 EVT ResultVT = EVT::getVectorVT(*DAG.getContext(), ElVT, in extractSubVector() local 5637 return DAG.getBuildVector(ResultVT, dl, in extractSubVector() 5641 return DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, ResultVT, Vec, VecIdx); in extractSubVector() 5674 EVT ResultVT = Result.getValueType(); in insertSubVector() local 5685 return DAG.getNode(ISD::INSERT_SUBVECTOR, dl, ResultVT, Result, Vec, VecIdx); in insertSubVector()
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