Searched refs:Rt1 (Results 1 – 5 of 5) sorted by relevance
| /external/crosvm/sys_util/src/ |
| D | signal.rs | 140 Rt1, enumerator
228 1 => Rt1, in try_from()
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| /external/clang/lib/CodeGen/ |
| D | CGBuiltin.cpp | 4071 Value *Rt1 = Builder.CreateExtractValue(RtAndRt2, 0); in EmitARMBuiltinExpr() local
4073 Rt1 = Builder.CreateZExt(Rt1, Int64Ty); in EmitARMBuiltinExpr()
4077 RtAndRt2 = Builder.CreateOr(RtAndRt2, Rt1); in EmitARMBuiltinExpr()
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AArch64/AsmParser/ |
| D | AArch64AsmParser.cpp | 4100 unsigned Rt1 = Inst.getOperand(1).getReg(); in validateInstruction() local
4103 if (RI->isSubRegisterEq(Rt1, Rs) || RI->isSubRegisterEq(Rt2, Rs) || in validateInstruction()
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| /external/llvm-project/llvm/lib/Target/AArch64/AsmParser/ |
| D | AArch64AsmParser.cpp | 4215 unsigned Rt1 = Inst.getOperand(1).getReg(); in validateInstruction() local
4218 if (RI->isSubRegisterEq(Rt1, Rs) || RI->isSubRegisterEq(Rt2, Rs) || in validateInstruction()
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| /external/llvm-project/clang/lib/CodeGen/ |
| D | CGBuiltin.cpp | 7079 Value *Rt1 = Builder.CreateExtractValue(RtAndRt2, 0); in EmitARMBuiltinExpr() local
7081 Rt1 = Builder.CreateZExt(Rt1, Int64Ty); in EmitARMBuiltinExpr()
7085 RtAndRt2 = Builder.CreateOr(RtAndRt2, Rt1); in EmitARMBuiltinExpr()
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