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Searched refs:S6_CBUF_BLEND_ENABLE (Results 1 – 11 of 11) sorted by relevance

/external/mesa3d/src/mesa/drivers/dri/i915/
Dintel_reg.h173 #define S6_CBUF_BLEND_ENABLE (1<<15) macro
Di915_state.c216 dw1 &= ~S6_CBUF_BLEND_ENABLE; in i915EvalLogicOpBlendState()
222 dw1 |= S6_CBUF_BLEND_ENABLE; in i915EvalLogicOpBlendState()
225 dw1 &= ~S6_CBUF_BLEND_ENABLE; in i915EvalLogicOpBlendState()
/external/igt-gpu-tools/lib/
Drendercopy_i915.c174 OUT_BATCH(S6_CBUF_BLEND_ENABLE | S6_COLOR_WRITE_ENABLE | in gen3_render_copyfunc()
Di915_reg.h429 #define S6_CBUF_BLEND_ENABLE (1<<15) macro
/external/igt-gpu-tools/tests/i915/
Dgen3_render_linear_blits.c189 *b++ = (S6_CBUF_BLEND_ENABLE | S6_COLOR_WRITE_ENABLE | in copy()
Dgen3_render_tiledy_blits.c189 *b++ = (S6_CBUF_BLEND_ENABLE | S6_COLOR_WRITE_ENABLE | in copy()
Dgen3_render_tiledx_blits.c189 *b++ = (S6_CBUF_BLEND_ENABLE | S6_COLOR_WRITE_ENABLE | in copy()
Dgen3_render_mixed_blits.c202 *b++ = (S6_CBUF_BLEND_ENABLE | S6_COLOR_WRITE_ENABLE | in copy()
Dgen3_mixed_blits.c215 *b++ = (S6_CBUF_BLEND_ENABLE | S6_COLOR_WRITE_ENABLE | in render_copy()
/external/mesa3d/src/gallium/drivers/i915/
Di915_reg.h426 #define S6_CBUF_BLEND_ENABLE (1<<15) macro
Di915_state.c168 cso_data->LIS6 |= (S6_CBUF_BLEND_ENABLE | in i915_create_blend_state()