Searched refs:SAR_RST_PCIE0_CLOCK_CONFIG_CP1_MASK (Results 1 – 1 of 1) sorted by relevance
57 #define SAR_RST_PCIE0_CLOCK_CONFIG_CP1_MASK (0x1 << \ macro1311 clk_dir = (reg & SAR_RST_PCIE0_CLOCK_CONFIG_CP1_MASK) >> in mvebu_cp110_comphy_pcie_power_on()