| /external/angle/extensions/ |
| D | EGL_CHROMIUM_sync_control.txt | 47 vertical retrace that occurs. The Swap Buffer Counter (SBC) is an
79 eglGetSyncValuesCHROMIUM returns the current UST/MSC/SBC triple. A UST
88 current SBC, comprise the current UST/MSC/SBC triple. The UST,
89 graphics MSC, and SBC values are not part of the render context
92 The SBC is per-surface state and is initialized to 0 when the
95 The SBC value is incremented by the graphics driver at the completion
98 formats that do not contain a back buffer, the SBC will always be
112 Each time eglSwapBuffer succeeds, the SBC will be increased within a
127 [SBC] eglGetSyncValuesCHROMIUM Z 0
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| D | EGL_ANGLE_sync_control_rate.txt | 47 vertical retrace that occurs. The Swap Buffer Counter (SBC) is an
95 Each time eglSwapBuffer succeeds, the SBC will be increased within a
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| /external/llvm-project/llvm/test/MC/ARM/ |
| D | negative-immediates.s | 42 SBC r0, r1, #0xFFFFFF00
45 # CHECK-DISABLED: SBC
165 SBC r0, r1, #0xFFFFFF00
168 # CHECK-DISABLED: SBC
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| /external/vixl/test/aarch32/config/ |
| D | cond-rd-rn-operand-rm-t32.json | 95 "Sbc", // SBC<c>{<q>} {<Rdn>}, <Rdn>, <Rm> ; T1
96 // SBC{<c>}{<q>} {<Rd>}, <Rn>, <Rm> {, <shift> #<amount> } ; T2
238 "Sbc" // SBC<c>{<q>} {<Rdn>}, <Rdn>, <Rm> ; T1
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| D | cond-rd-rn-operand-const-a32.json | 48 "Sbc", // SBC{<c>}{<q>} {<Rd>}, <Rn>, #<const> ; A1
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| D | cond-rd-rn-operand-rm-shift-rs-a32.json | 45 "Sbc", // SBC{<c>}{<q>} {<Rd>}, <Rn>, <Rm>, <shift> <Rs> ; A1
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| D | cond-rd-rn-operand-const-t32.json | 54 "Sbc", // SBC{<c>}{<q>} {<Rd>}, <Rn>, #<const> ; T1
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| D | cond-rd-rn-operand-rm-shift-amount-1to31-a32.json | 47 "Sbc", // SBC{<c>}{<q>} {<Rd>}, <Rn>, <Rm> {, <shift> #<amount> } ; A1
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| D | cond-rd-rn-operand-rm-shift-amount-1to32-a32.json | 47 "Sbc", // SBC{<c>}{<q>} {<Rd>}, <Rn>, <Rm> {, <shift> #<amount> } ; A1
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| D | cond-rd-rn-operand-rm-shift-amount-1to32-t32.json | 51 "Sbc", // SBC{<c>}{<q>} {<Rd>}, <Rn>, <Rm> {, <shift> #<amount> } ; T2
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| D | cond-rd-rn-operand-rm-shift-amount-1to31-t32.json | 51 "Sbc", // SBC{<c>}{<q>} {<Rd>}, <Rn>, <Rm> {, <shift> #<amount> } ; T2
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| D | cond-rd-rn-operand-rm-a32.json | 56 "Sbc", // SBC{<c>}{<q>} {<Rd>}, <Rn>, <Rm> {, <shift> #<amount> } ; A1
|
| /external/mesa3d/docs/relnotes/ |
| D | 18.1.1.rst | 111 - dri3: Stricter SBC wraparound handling
|
| D | 18.0.5.rst | 118 - dri3: Stricter SBC wraparound handling
|
| /external/llvm-project/llvm/test/MC/Disassembler/ARM/ |
| D | thumb1.txt | 369 # SBC
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| /external/adhd/cras/ |
| D | configure.ac | 73 PKG_CHECK_MODULES([SBC], [ sbc >= 1.0 ])
|
| /external/llvm/test/MC/Disassembler/ARM/ |
| D | thumb1.txt | 369 # SBC
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| /external/OpenCSD/decoder/tests/snapshots/TC2/ds5-dumps/ |
| D | etmv3_0x11.txt | 5 Instruction 1 S:0xC00509EC 0xEB6B014B 1 SBC r1,r11,r11,LSL #1 false
412 Instruction 394 S:0xC003F8E6 0xEB650503 1 SBC r5,r5,r3 false
841 Instruction 811 S:0xC003B7C0 0xEB630309 1 SBC r3,r3,r9 false
952 Instruction 922 S:0xC003F7D0 0xEB690903 1 SBC r9,r9,r3 false
961 Instruction 931 S:0xC003F7E8 0xEB670705 1 SBC r7,r7,r5 false
1004 Instruction 974 S:0xC0043E58 0xEB630301 1 SBC r3,r3,r1 false
1018 Instruction 988 S:0xC0043E82 0xEB610303 1 SBC r3,r1,r3 false
1039 Instruction 1009 S:0xC0043EC8 0xEB690505 1 SBC r5,r9,r5 false
1115 Instruction 1085 S:0xC0043FBA 0xEB6373E0 1 SBC r3,r3,r0,ASR #31 false
1263 Instruction 1229 S:0xC003FBC0 0xEB630505 1 SBC r5,r3,r5 false
[all …]
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| D | ptmv1_0x13.txt | 217 Instruction 192 S:0xC004F5A8 0xEB610103 0 SBC r1,r1,r3 false
340 Instruction 313 S:0xC004F5A8 0xEB610103 0 SBC r1,r1,r3 false
379 Instruction 352 S:0xC0054296 0xEB650507 0 SBC r5,r5,r7 false
1141 Instruction 1075 S:0xC004EFE8 0xEB690905 0 SBC r9,r9,r5 false
1359 Instruction 1287 S:0xC004F5A8 0xEB610103 0 SBC r1,r1,r3 false
1421 Instruction 1349 S:0xC00557BA 0xEB630505 0 SBC r5,r3,r5 false
1478 Instruction 1406 S:0xC0055594 0xEB650303 0 SBC r3,r5,r3 false
1615 Instruction 1539 S:0xC003B7C0 0xEB630309 0 SBC r3,r3,r9 false
1689 Instruction 1613 S:0xC0043E58 0xEB630301 0 SBC r3,r3,r1 false
1745 Instruction 1669 S:0xC0043EC8 0xEB690505 0 SBC r5,r9,r5 false
[all …]
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| D | etmv3_0x10.txt | 64 Instruction 55 S:0xC004EFE8 0xEB690905 1 SBC r9,r9,r5 false
231 Instruction 209 S:0xC004EFE8 0xEB690905 1 SBC r9,r9,r5 false
903 Instruction 842 S:0xC004EFE8 0xEB690905 1 SBC r9,r9,r5 false
1465 Instruction 1343 S:0xC003B7C0 0xEB630309 1 SBC r3,r3,r9 false
1582 Instruction 1460 S:0xC003F7D0 0xEB690903 1 SBC r9,r9,r3 false
1591 Instruction 1469 S:0xC003F7E8 0xEB670705 1 SBC r7,r7,r5 false
1637 Instruction 1515 S:0xC00426E8 0xEB650101 1 SBC r1,r5,r1 false
1722 Instruction 1600 S:0xC004279A 0xEB6B73E4 1 SBC r3,r11,r4,ASR #31 false
1883 Instruction 1757 S:0xC003FBC0 0xEB630505 5 SBC r5,r3,r5 false
1930 Instruction 1804 S:0xC003FC52 0xEB630305 1 SBC r3,r3,r5 false
[all …]
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| D | etmv3_0x12.txt | 213 Instruction 197 S:0xC003B7C0 0xEB630309 1 SBC r3,r3,r9 false
331 Instruction 315 S:0xC003BC80 0xEB650503 1 SBC r5,r5,r3 false
427 Instruction 411 S:0xC003F7E8 0xEB670705 1 SBC r7,r7,r5 false
470 Instruction 454 S:0xC004307A 0xEB650101 1 SBC r1,r5,r1 false
547 Instruction 531 S:0xC0043122 0xEB6971E2 1 SBC r1,r9,r2,ASR #31 false
702 Instruction 682 S:0xC003FBC0 0xEB630505 1 SBC r5,r3,r5 false
749 Instruction 729 S:0xC003FC52 0xEB630305 1 SBC r3,r3,r5 false
790 Instruction 770 S:0xC00432E4 0xEB650101 1 SBC r1,r5,r1 false
850 Instruction 829 S:0xC00434FC 0xEB6777EC 1 SBC r7,r7,r12,ASR #31 false
1191 Instruction 1162 S:0xC0035356 0xEB670303 1 SBC r3,r7,r3 false
[all …]
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| /external/llvm/lib/Target/AArch64/ |
| D | AArch64ISelLowering.h | 53 SBC, // adc, sbc instructions enumerator
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AVR/ |
| D | AVRExpandPseudoInsts.cpp | 1485 auto SBC = buildMI(MBB, MBBI, AVR::SBCRdRr) in expand() local
1491 SBC->getOperand(3).setIsDead(); in expand()
1494 SBC->getOperand(4).setIsKill(); in expand()
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| /external/llvm-project/llvm/lib/Target/AVR/ |
| D | AVRExpandPseudoInsts.cpp | 1523 auto SBC = buildMI(MBB, MBBI, AVR::SBCRdRr) in expand() local
1529 SBC->getOperand(3).setIsDead(); in expand()
1532 SBC->getOperand(4).setIsKill(); in expand()
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| /external/walt/hardware/enclosure/ |
| D | WALT_recessed_enclosure.stl | 52 …���@��SBC��@��L@��G�*�L�>?������SBC��@��L@��SB&��@���@��SBC��@���@��|2���7?������SBC��@��L@��SBC�…
93 …���@��SBC(B��L@��G�*�L�>?������SBC(B��L@��SB��B���@��SBC(B���@��|2���7?������SBC(B��L@��SBC(…
546 …������������?3�_BΣ�?���@�RTB�̔@���@�TB��@���@�������������?�TB��@���@��SBC��@���@3�_BΣ�?���@��…
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