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Searched refs:SBCS (Results 1 – 25 of 176) sorted by relevance

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/external/icu/icu4c/source/data/mappings/
Dicu-internal-compound-s1.ucm15 <uconv_class> "SBCS"
Dicu-internal-compound-s2.ucm15 <uconv_class> "SBCS"
Dicu-internal-compound-s3.ucm15 <uconv_class> "SBCS"
Dibm-803_P100-1999.ucm17 <uconv_class> "SBCS"
Dibm-4899_P100-1998.ucm17 <uconv_class> "SBCS"
Dibm-1133_P100-1997.ucm17 <uconv_class> "SBCS"
Dibm-290_P100-1995.ucm17 <uconv_class> "SBCS"
Dmacos-29-10.2.ucm31 <uconv_class> "SBCS"
Dmacos-7_3-10.2.ucm31 <uconv_class> "SBCS"
Dibm-1132_P100-1998.ucm17 <uconv_class> "SBCS"
Dibm-12712_P100-1998.ucm17 <uconv_class> "SBCS"
/external/icu/icu4j/main/classes/charset/src/com/ibm/icu/charset/
DUConverterSharedData.java353 static final int SBCS = 0; field in UConverterSharedData.UConverterType
/external/llvm-project/llvm/test/MC/ARM/
Dthumb2-narrow-dp.ll574 SBCS r3, r2, r1 // Must be wide - 3 distinct registers
575 SBCS r4, r4, r1 // Should choose narrow
576 SBCS r1, r4, r1 // Should choose wide - not commutative
577 SBCS.W r4, r4, r1 // Explicitly wide
578 SBCS.W r2, r1, r2
580 SBCS r7, r7, r1 // Should use narrow
581 SBCS r8, r1, r8 // high registers so must use wide encoding
582 SBCS r8, r8, r1
583 SBCS r4, r8, r4
584 SBCS r3, r3, r8
[all …]
/external/llvm/test/MC/ARM/
Dthumb2-narrow-dp.ll574 SBCS r3, r2, r1 // Must be wide - 3 distinct registers
575 SBCS r4, r4, r1 // Should choose narrow
576 SBCS r1, r4, r1 // Should choose wide - not commutative
577 SBCS.W r4, r4, r1 // Explicitly wide
578 SBCS.W r2, r1, r2
580 SBCS r7, r7, r1 // Should use narrow
581 SBCS r8, r1, r8 // high registers so must use wide encoding
582 SBCS r8, r8, r1
583 SBCS r4, r8, r4
584 SBCS r3, r3, r8
[all …]
/external/icu/icu4c/source/test/testdata/
Dconversion.txt216 :intvector{ 0,1,1,1,1,2,3,4,4,4,4,5,6,7,7,7,7,7,7,7,7,9, // SBCS
218 25 }, // SBCS
229 // Test bug 6071 (2:1 Unicode:charset SBCS mapping).
588 // ISO-2022 SBCS
1038 // Test bug 6071 (1:2 Unicode:charset SBCS mapping).
1055 // Verify that mappings that would result in byte values outside 20..7F (for SBCS)
1095 // Code coverage for UTF-8->SBCS conversion (ucnv_convertEx()).
1097 // (try EBCDIC SBCS, and IBM PC SBCS with control code rotation).
/external/vixl/test/aarch32/config/
Dcond-rd-rn-operand-const-a32.json49 "Sbcs", // SBCS{<c>}{<q>} {<Rd>}, <Rn>, #<const> ; A1
Dcond-rd-rn-operand-rm-t32.json98 "Sbcs", // SBCS{<q>} {<Rdn>}, <Rdn>, <Rm> ; T1
99 // SBCS{<c>}{<q>} {<Rd>}, <Rn>, <Rm> {, <shift> #<amount> } ; T2
Dcond-rd-rn-operand-rm-shift-rs-a32.json46 "Sbcs", // SBCS{<c>}{<q>} {<Rd>}, <Rn>, <Rm>, <shift> <Rs> ; A1
Dcond-rd-rn-operand-const-t32.json55 "Sbcs", // SBCS{<c>}{<q>} {<Rd>}, <Rn>, #<const> ; T1
Dcond-rd-rn-operand-rm-shift-amount-1to31-a32.json48 "Sbcs", // SBCS{<c>}{<q>} {<Rd>}, <Rn>, <Rm> {, <shift> #<amount> } ; A1
Dcond-rd-rn-operand-rm-shift-amount-1to32-a32.json48 "Sbcs", // SBCS{<c>}{<q>} {<Rd>}, <Rn>, <Rm> {, <shift> #<amount> } ; A1
Dcond-rd-rn-operand-rm-shift-amount-1to32-t32.json52 "Sbcs", // SBCS{<c>}{<q>} {<Rd>}, <Rn>, <Rm> {, <shift> #<amount> } ; T2
Dcond-rd-rn-operand-rm-shift-amount-1to31-t32.json52 "Sbcs", // SBCS{<c>}{<q>} {<Rd>}, <Rn>, <Rm> {, <shift> #<amount> } ; T2
Dcond-rd-rn-operand-rm-a32.json57 "Sbcs", // SBCS{<c>}{<q>} {<Rd>}, <Rn>, <Rm> {, <shift> #<amount> } ; A1
/external/OpenCSD/decoder/tests/snapshots/TC2/ds5-dumps/
Detmv3_0x12.txt335 Instruction 319 S:0xC003BC8E 0xEB790C05 1 SBCS r12,r9,r5 false
429 Instruction 413 S:0xC003F7EE 0xF1770100 1 SBCS r1,r7,#0 false
497 Instruction 481 S:0xC0043086 0xF1710E00 1 SBCS lr,r1,#0 false
816 Instruction 796 S:0xC00432EE 0xF1710E00 1 SBCS lr,r1,#0 false
1194 Instruction 1165 S:0xC003535E 0xF1730400 1 SBCS r4,r3,#0 false
1201 Instruction 1172 S:0xC0035372 0xEB750E01 1 SBCS lr,r5,r1 false
1206 Instruction 1177 S:0xC003537E 0xEB730005 15 SBCS r0,r3,r5 false
1226 Instruction 1197 S:0xC0034D10 0xF1750300 1 SBCS r3,r5,#0 false
1229 Instruction 1200 S:0xC0034D18 0xEB750307 1 SBCS r3,r5,r7 false
1232 Instruction 1203 S:0xC0034D30 0xEB750309 1 SBCS r3,r5,r9 false
[all …]

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