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Searched refs:SCALE1 (Results 1 – 5 of 5) sorted by relevance

/external/llvm-project/llvm/test/CodeGen/AMDGPU/
Dshl_add_ptr.ll299 ; GCN: v_lshlrev_b32_e32 [[SCALE1:v[0-9]+]], 4, v0
300 ; GCN: ds_write_b32 [[SCALE1]], v{{[0-9]+}} offset:64
314 ; GCN-DAG: v_lshlrev_b32_e32 [[SCALE1:v[0-9]+]], 4, v0
316 ; GCN-DAG: v_add_{{[iu]}}32_e32 [[ADD1:v[0-9]+]], vcc, 0x1fff0, [[SCALE1]]
332 ; GCN-DAG: v_lshlrev_b32_e32 [[SCALE1:v[0-9]+]], 5, [[ADD]]
334 ; GCN: ds_write_b32 [[SCALE1]], v{{[0-9]+$}}
350 ; GCN: v_lshlrev_b32_e32 [[SCALE1:v[0-9]+]], 3, v0
351 ; GCN: buffer_store_dword v{{[0-9]+}}, [[SCALE1]], s[0:3], 0 offen offset:32
366 ; GCN-DAG: v_lshlrev_b32_e32 [[SCALE1:v[0-9]+]], 4, v0
368 ; GCN-DAG: v_add_{{[iu]}}32_e32 [[ADD:v[0-9]+]], vcc, 0x1ff0, [[SCALE1]]
[all …]
Dfdiv.f64.ll10 ; CI-DAG: v_div_scale_f64 [[SCALE1:v\[[0-9]+:[0-9]+\]]], vcc, [[NUM]], [[DEN]], [[NUM]]
14 ; SI-DAG: v_div_scale_f64 [[SCALE1:v\[[0-9]+:[0-9]+\]]], {{s\[[0-9]+:[0-9]+\]}}, [[NUM]], [[DEN]], …
26 ; GCN-DAG: v_mul_f64 [[MUL:v\[[0-9]+:[0-9]+\]]], [[SCALE1]], [[FMA3]]
27 ; GCN-DAG: v_fma_f64 [[FMA4:v\[[0-9]+:[0-9]+\]]], -[[SCALE0]], [[MUL]], [[SCALE1]]
/external/llvm/test/CodeGen/AMDGPU/
Dfdiv.f64.ll10 ; CI-DAG: v_div_scale_f64 [[SCALE1:v\[[0-9]+:[0-9]+\]]], vcc, [[NUM]], [[DEN]], [[NUM]]
14 ; SI-DAG: v_div_scale_f64 [[SCALE1:v\[[0-9]+:[0-9]+\]]], {{s\[[0-9]+:[0-9]+\]}}, [[NUM]], [[DEN]], …
26 ; COMMON-DAG: v_mul_f64 [[MUL:v\[[0-9]+:[0-9]+\]]], [[SCALE1]], [[FMA3]]
27 ; COMMON-DAG: v_fma_f64 [[FMA4:v\[[0-9]+:[0-9]+\]]], -[[SCALE0]], [[MUL]], [[SCALE1]]
/external/libxaac/decoder/
Dixheaacd_lpc.c198 #define SCALE1 (6400.0 / PI) macro
203 lsf[i] = (float)(acos(lsp[i]) * SCALE1); in ixheaacd_lsp_2_lsf_conversion()
/external/one-true-awk/testdir/
Dfunstack.ok1575 C. R. Lewart ACM Algorithm 463: Algorithms SCALE1,