Home
last modified time | relevance | path

Searched refs:SCR_FIQ_BIT (Results 1 – 20 of 20) sorted by relevance

/external/arm-trusted-firmware/plat/imx/imx8m/
Dimx8m_psci_common.c93 write_scr_el3(read_scr_el3() | SCR_FIQ_BIT); in imx_cpu_standby()
98 write_scr_el3(read_scr_el3() & (~SCR_FIQ_BIT)); in imx_cpu_standby()
114 write_scr_el3(read_scr_el3() | SCR_FIQ_BIT); in imx_domain_suspend()
142 write_scr_el3(read_scr_el3() & (~SCR_FIQ_BIT)); in imx_domain_suspend_finish()
/external/arm-trusted-firmware/plat/common/
Dplat_gicv3.c161 return __builtin_ctz(SCR_FIQ_BIT); in plat_interrupt_type_to_line()
169 return __builtin_ctz(SCR_FIQ_BIT); in plat_interrupt_type_to_line()
178 return __builtin_ctz(SCR_FIQ_BIT); in plat_interrupt_type_to_line()
Dplat_gicv2.c149 return ((gicv2_is_fiq_enabled() != 0U) ? __builtin_ctz(SCR_FIQ_BIT) : in plat_interrupt_type_to_line()
/external/arm-trusted-firmware/plat/imx/imx8qx/
Dimx8qx_psci.c123 write_scr_el3(read_scr_el3() | SCR_FIQ_BIT); in imx_domain_suspend()
211 write_scr_el3(read_scr_el3() & (~SCR_FIQ_BIT)); in imx_domain_suspend_finish()
/external/arm-trusted-firmware/plat/imx/imx8m/imx8mq/
Dimx8mq_psci.c55 write_scr_el3(read_scr_el3() | SCR_FIQ_BIT); in imx_domain_suspend()
/external/arm-trusted-firmware/plat/imx/imx8qm/
Dimx8qm_psci.c149 write_scr_el3(read_scr_el3() | SCR_FIQ_BIT); in imx_domain_suspend()
278 write_scr_el3(read_scr_el3() & (~SCR_FIQ_BIT)); in imx_domain_suspend_finish()
/external/arm-trusted-firmware/drivers/renesas/common/watchdog/
Dswdt.c143 write_scr_el3(read_scr_el3() & ~SCR_FIQ_BIT); in rcar_swdt_release()
/external/arm-trusted-firmware/plat/rpi/common/
Drpi3_common.c246 return __builtin_ctz(SCR_FIQ_BIT); in plat_interrupt_type_to_line()
/external/arm-trusted-firmware/plat/arm/css/common/
Dcss_pm.c252 write_scr_el3(scr | SCR_IRQ_BIT | SCR_FIQ_BIT); in css_cpu_standby()
/external/arm-trusted-firmware/plat/ti/k3/common/
Dk3_psci.c32 write_scr_el3(scr | SCR_IRQ_BIT | SCR_FIQ_BIT); in k3_cpu_standby()
/external/arm-trusted-firmware/plat/brcm/board/stingray/src/
Dbrcm_pm_ops.c206 write_scr_el3(scr | SCR_IRQ_BIT | SCR_FIQ_BIT); in brcm_cpu_standby()
/external/arm-trusted-firmware/plat/hisilicon/hikey960/
Dhikey960_pm.c47 write_scr_el3(scr | SCR_IRQ_BIT | SCR_FIQ_BIT); in hikey960_pwr_domain_standby()
/external/arm-trusted-firmware/bl32/sp_min/aarch32/
Dentrypoint.S33 orr \reg, \reg, #SCR_FIQ_BIT
/external/arm-trusted-firmware/plat/mediatek/mt8192/
Dplat_pm.c185 write_scr_el3(scr | SCR_IRQ_BIT | SCR_FIQ_BIT); in plat_cpu_standby()
/external/arm-trusted-firmware/lib/el3_runtime/aarch64/
Dcontext_mgmt.c90 scr_el3 &= ~(SCR_NS_BIT | SCR_RW_BIT | SCR_FIQ_BIT | SCR_IRQ_BIT | in cm_setup_context()
/external/arm-trusted-firmware/plat/mediatek/mt8183/
Dplat_pm.c203 write_scr_el3(scr | SCR_IRQ_BIT | SCR_FIQ_BIT); in plat_cpu_standby()
/external/arm-trusted-firmware/plat/renesas/rzg/
Dbl2_plat_setup.c620 write_scr_el3(read_scr_el3() | SCR_FIQ_BIT); in bl2_el3_early_platform_setup()
/external/arm-trusted-firmware/plat/renesas/rcar/
Dbl2_plat_setup.c738 write_scr_el3(read_scr_el3() | SCR_FIQ_BIT); in bl2_el3_early_platform_setup()
/external/arm-trusted-firmware/include/arch/aarch32/
Darch.h209 #define SCR_FIQ_BIT (UL(1) << 2) macro
/external/arm-trusted-firmware/include/arch/aarch64/
Darch.h426 #define SCR_FIQ_BIT (UL(1) << 2) macro