Searched refs:SCR_FIQ_BIT (Results 1 – 20 of 20) sorted by relevance
93 write_scr_el3(read_scr_el3() | SCR_FIQ_BIT); in imx_cpu_standby()98 write_scr_el3(read_scr_el3() & (~SCR_FIQ_BIT)); in imx_cpu_standby()114 write_scr_el3(read_scr_el3() | SCR_FIQ_BIT); in imx_domain_suspend()142 write_scr_el3(read_scr_el3() & (~SCR_FIQ_BIT)); in imx_domain_suspend_finish()
161 return __builtin_ctz(SCR_FIQ_BIT); in plat_interrupt_type_to_line()169 return __builtin_ctz(SCR_FIQ_BIT); in plat_interrupt_type_to_line()178 return __builtin_ctz(SCR_FIQ_BIT); in plat_interrupt_type_to_line()
149 return ((gicv2_is_fiq_enabled() != 0U) ? __builtin_ctz(SCR_FIQ_BIT) : in plat_interrupt_type_to_line()
123 write_scr_el3(read_scr_el3() | SCR_FIQ_BIT); in imx_domain_suspend()211 write_scr_el3(read_scr_el3() & (~SCR_FIQ_BIT)); in imx_domain_suspend_finish()
55 write_scr_el3(read_scr_el3() | SCR_FIQ_BIT); in imx_domain_suspend()
149 write_scr_el3(read_scr_el3() | SCR_FIQ_BIT); in imx_domain_suspend()278 write_scr_el3(read_scr_el3() & (~SCR_FIQ_BIT)); in imx_domain_suspend_finish()
143 write_scr_el3(read_scr_el3() & ~SCR_FIQ_BIT); in rcar_swdt_release()
246 return __builtin_ctz(SCR_FIQ_BIT); in plat_interrupt_type_to_line()
252 write_scr_el3(scr | SCR_IRQ_BIT | SCR_FIQ_BIT); in css_cpu_standby()
32 write_scr_el3(scr | SCR_IRQ_BIT | SCR_FIQ_BIT); in k3_cpu_standby()
206 write_scr_el3(scr | SCR_IRQ_BIT | SCR_FIQ_BIT); in brcm_cpu_standby()
47 write_scr_el3(scr | SCR_IRQ_BIT | SCR_FIQ_BIT); in hikey960_pwr_domain_standby()
33 orr \reg, \reg, #SCR_FIQ_BIT
185 write_scr_el3(scr | SCR_IRQ_BIT | SCR_FIQ_BIT); in plat_cpu_standby()
90 scr_el3 &= ~(SCR_NS_BIT | SCR_RW_BIT | SCR_FIQ_BIT | SCR_IRQ_BIT | in cm_setup_context()
203 write_scr_el3(scr | SCR_IRQ_BIT | SCR_FIQ_BIT); in plat_cpu_standby()
620 write_scr_el3(read_scr_el3() | SCR_FIQ_BIT); in bl2_el3_early_platform_setup()
738 write_scr_el3(read_scr_el3() | SCR_FIQ_BIT); in bl2_el3_early_platform_setup()
209 #define SCR_FIQ_BIT (UL(1) << 2) macro
426 #define SCR_FIQ_BIT (UL(1) << 2) macro