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Searched refs:SCSRSTECR2 (Results 1 – 2 of 2) sorted by relevance

/external/arm-trusted-firmware/plat/renesas/common/include/registers/
Dcpg_registers.h62 #define SCSRSTECR2 (CPG_BASE + 0x0B88U) macro
/external/arm-trusted-firmware/plat/renesas/common/
Dbl2_cpg_init.c97 cpg_write(SCSRSTECR2, reset_cr2); in bl2_secure_cpg_init()