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Searched refs:SDATA (Results 1 – 5 of 5) sorted by relevance

/external/mesa3d/src/gallium/drivers/nouveau/codegen/
Dnv50_ir_emit_nv50.cpp134 #define SDATA(a) ((a).rep()->reg.data) macro
140 code[pos / 32] |= SDATA(src).id << (pos % 32); in srcId()
146 code[pos / 32] |= SDATA(*src).id << (pos % 32); in srcId()
153 int32_t offset = SDATA(src).offset; in srcAddr16()
171 uint32_t offset = SDATA(src).offset; in srcAddr8()
299 setARegBits(SDATA(i->src(s)).id + 1); in setAReg16()
770 setARegBits(SDATA(i->src(0)).id + 1); in emitMOV()
805 switch (SDATA(ref).sv.sv) { in getSRegEncoding()
873 setARegBits(SDATA(i->src(1)).id + 1); in emitPFETCH()
1120 setARegBits(SDATA(i->src(0)).id + 1); in emitAADD()
[all …]
Dnv50_ir_emit_gk110.cpp177 #define SDATA(a) ((a).rep()->reg.data) macro
182 code[pos / 32] |= (src.get() ? SDATA(src).id : GK110_GPR_ZERO) << (pos % 32); in srcId()
187 code[pos / 32] |= (src ? SDATA(*src).id : GK110_GPR_ZERO) << (pos % 32); in srcId()
192 int r = insn->srcExists(s) ? SDATA(insn->src(s)).id : GK110_GPR_ZERO; in srcId()
198 code[pos / 32] |= (SDATA(src).offset >> 2) << (pos % 32); in srcAddr32()
2081 addInterp(i->ipa, SDATA(i->src(1)).id, gk110_interpApply); in emitINTERP()
2169 int32_t offset = SDATA(i->src(0)).offset; in emitSTORE()
2218 int32_t offset = SDATA(i->src(0)).offset; in emitLOAD()
2293 switch (SDATA(ref).sv.sv) { in getSRegEncoding()
2301 case SV_TID: return 0x21 + SDATA(ref).sv.index; in getSRegEncoding()
[all …]
Dnv50_ir_emit_nvc0.cpp170 #define SDATA(a) ((a).rep()->reg.data) macro
175 code[pos / 32] |= (src.get() ? SDATA(src).id : 63) << (pos % 32); in srcId()
180 code[pos / 32] |= (src ? SDATA(*src).id : 63) << (pos % 32); in srcId()
185 int r = insn->srcExists(s) ? SDATA(insn->src(s)).id : 63; in srcId()
192 const uint32_t offset = SDATA(src).offset >> shr; in srcAddr32()
1704 unsigned int stream = SDATA(i->src(1)).u32; in emitOUT()
1765 addInterp(i->ipa, SDATA(i->src(1)).id, nvc0_interpApply); in emitINTERP()
1986 switch (SDATA(ref).sv.sv) { in getSRegEncoding()
1994 case SV_TID: return 0x21 + SDATA(ref).sv.index; in getSRegEncoding()
1995 case SV_CTAID: return 0x25 + SDATA(ref).sv.index; in getSRegEncoding()
[all …]
/external/llvm/test/CodeGen/AMDGPU/
Dflat-address-space.ll15 ; CHECK-DAG: s_load_dword s[[SDATA:[0-9]+]],
17 ; CHECK-DAG: v_mov_b32_e32 v[[DATA:[0-9]+]], s[[SDATA]]
/external/llvm-project/llvm/test/CodeGen/AMDGPU/
Dflat-address-space.ll9 ; CHECK-DAG: s_load_dword s[[SDATA:[0-9]+]],
11 ; CHECK-DAG: v_mov_b32_e32 v[[DATA:[0-9]+]], s[[SDATA]]