| /external/llvm/test/CodeGen/AMDGPU/ |
| D | unsupported-cc.ll | 30 ; CHECK: SETGE * T{{[0-9]}}.[[CHAN:[XYZW]]], KC0[2].Z, literal.x
44 ; CHECK-NEXT: SETGE {{\*? *}}T{{[0-9]\.[XYZW]}}, KC0[2].Z, {{literal\.[xy]}}
117 ; CHECK-NEXT: SETGE {{\*? *}}T{{[0-9]\.[XYZW]}}, {{literal\.[xy]}}, KC0[2].Z
|
| D | llvm.round.ll | 20 ; R600-DAG: SETGE
|
| D | setcc.ll | 143 ; R600: SETGE
170 ; R600: SETGE
|
| /external/llvm-project/llvm/test/CodeGen/AMDGPU/ |
| D | unsupported-cc.ll | 30 ; CHECK: SETGE * T{{[0-9]}}.[[CHAN:[XYZW]]], KC0[2].Z, literal.x
44 ; CHECK-NEXT: SETGE {{\*? *}}T{{[0-9]\.[XYZW]}}, KC0[2].Z, {{literal\.[xy]}}
117 ; CHECK-NEXT: SETGE {{\*? *}}T{{[0-9]\.[XYZW]}}, {{literal\.[xy]}}, KC0[2].Z
|
| D | llvm.round.ll | 21 ; R600-DAG: SETGE
|
| D | setcc.ll | 149 ; R600: SETGE
176 ; R600: SETGE
|
| /external/llvm/include/llvm/CodeGen/ |
| D | ISDOpcodes.h | 872 SETGE, // 1 X 0 1 1 True if greater than or equal enumerator
884 return Code == SETGT || Code == SETGE || Code == SETLT || Code == SETLE; in isSignedIntSetCC()
|
| /external/swiftshader/third_party/llvm-10.0/llvm/include/llvm/CodeGen/ |
| D | ISDOpcodes.h | 1069 SETGE, // 1 X 0 1 1 True if greater than or equal enumerator
1081 return Code == SETGT || Code == SETGE || Code == SETLT || Code == SETLE; in isSignedIntSetCC()
|
| /external/llvm-project/llvm/include/llvm/CodeGen/ |
| D | ISDOpcodes.h | 1285 SETGE, // 1 X 0 1 1 True if greater than or equal enumerator
1297 return Code == SETGT || Code == SETGE || Code == SETLT || Code == SETLE; in isSignedIntSetCC()
|
| /external/llvm-project/llvm/lib/Target/VE/ |
| D | VEISelDAGToDAG.cpp | 41 case ISD::SETGE: in intCondCode2Icc()
76 case ISD::SETGE: in fpCondCode2Fcc()
|
| /external/llvm/lib/CodeGen/ |
| D | Analysis.cpp | 191 case ISD::SETOGE: case ISD::SETUGE: return ISD::SETGE; in getFCmpCodeWithoutNaN()
205 case ICmpInst::ICMP_SGE: return ISD::SETGE; in getICmpCondCode()
|
| D | TargetLoweringBase.cpp | 771 CCs[RTLIB::OGE_F32] = ISD::SETGE; in InitCmpLibcallCCs()
772 CCs[RTLIB::OGE_F64] = ISD::SETGE; in InitCmpLibcallCCs()
773 CCs[RTLIB::OGE_F128] = ISD::SETGE; in InitCmpLibcallCCs()
774 CCs[RTLIB::OGE_PPCF128] = ISD::SETGE; in InitCmpLibcallCCs()
|
| /external/llvm/lib/Target/WebAssembly/ |
| D | WebAssemblyInstrInteger.td | 51 defm GE_S : ComparisonInt<SETGE, "ge_s">;
|
| /external/llvm/lib/Target/Hexagon/ |
| D | HexagonSelectCCInfo.td | 63 IntRegs:$fval, SETGE)),
|
| /external/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/ |
| D | Analysis.cpp | 230 case ISD::SETOGE: case ISD::SETUGE: return ISD::SETGE; in getFCmpCodeWithoutNaN()
244 case ICmpInst::ICMP_SGE: return ISD::SETGE; in getICmpCondCode()
|
| D | TargetLoweringBase.cpp | 546 CCs[RTLIB::OGE_F32] = ISD::SETGE; in InitCmpLibcallCCs()
547 CCs[RTLIB::OGE_F64] = ISD::SETGE; in InitCmpLibcallCCs()
548 CCs[RTLIB::OGE_F128] = ISD::SETGE; in InitCmpLibcallCCs()
549 CCs[RTLIB::OGE_PPCF128] = ISD::SETGE; in InitCmpLibcallCCs()
|
| /external/llvm-project/llvm/lib/CodeGen/ |
| D | Analysis.cpp | 231 case ISD::SETOGE: case ISD::SETUGE: return ISD::SETGE; in getFCmpCodeWithoutNaN()
245 case ICmpInst::ICMP_SGE: return ISD::SETGE; in getICmpCondCode()
|
| /external/llvm/lib/Target/X86/ |
| D | X86InstrCMovSetCC.td | 109 defm SETGE : SETCC<0x9D, "setge", X86_COND_GE>; // signed greater or equal
|
| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/BPF/ |
| D | BPFISelLowering.cpp | 689 SET_NEWCC(SETGE, JSGE); in EmitInstrWithCustomInserter()
703 CC == ISD::SETGE || in EmitInstrWithCustomInserter()
|
| /external/llvm-project/llvm/lib/Target/AMDGPU/ |
| D | SIInsertSkips.cpp | 287 case ISD::SETGE: in kill()
|
| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/WebAssembly/ |
| D | WebAssemblyInstrInteger.td | 82 defm GE_S : ComparisonInt<SETGE, "ge_s", 0x4e, 0x59>;
|
| /external/llvm-project/llvm/lib/Target/WebAssembly/ |
| D | WebAssemblyInstrInteger.td | 82 defm GE_S : ComparisonInt<SETGE, "ge_s", 0x4e, 0x59>;
|
| /external/llvm-project/llvm/lib/Target/BPF/ |
| D | BPFISelLowering.cpp | 728 SET_NEWCC(SETGE, JSGE); in EmitInstrWithCustomInserter()
742 CC == ISD::SETGE || in EmitInstrWithCustomInserter()
|
| /external/swiftshader/third_party/llvm-10.0/configs/common/lib/Target/PowerPC/ |
| D | PPCGenDAGISel.inc | 3921 /* 8436*/ OPC_CheckChild2CondCode, ISD::SETGE,
3931 …(anyext:{ *:[i32] } (setcc:{ *:[i1] } i32:{ *:[i32] }:$s1, 0:{ *:[i32] }, SETGE:{ *:[Other] })) - …
4017 /* 8693*/ OPC_CheckChild2CondCode, ISD::SETGE,
4033 …(anyext:{ *:[i64] } (setcc:{ *:[i1] } i32:{ *:[i32] }:$s1, 0:{ *:[i32] }, SETGE:{ *:[Other] })) - …
4144 /* 9050*/ OPC_CheckChild2CondCode, ISD::SETGE,
4157 …anyext:{ *:[i32] } (setcc:{ *:[i1] } i32:{ *:[i32] }:$s1, -1:{ *:[i32] }, SETGE:{ *:[Other] })) - …
4218 /* 9256*/ OPC_CheckChild2CondCode, ISD::SETGE,
4237 …anyext:{ *:[i64] } (setcc:{ *:[i1] } i32:{ *:[i32] }:$s1, -1:{ *:[i32] }, SETGE:{ *:[Other] })) - …
4292 /* 9453*/ OPC_CheckChild2CondCode, ISD::SETGE,
4310 …} i32:{ *:[i32] }:$s1, (imm:{ *:[i32] })<<P:Predicate_imm32SExt16>>:$imm, SETGE:{ *:[Other] })) - …
[all …]
|
| /external/llvm/lib/Target/AMDGPU/ |
| D | AMDGPUInstructions.td | 101 [{return N->get() == ISD::SETOGE || N->get() == ISD::SETGE;}]
141 def COND_SGE : PatLeaf <(cond), [{return N->get() == ISD::SETGE;}]>;
|