| /external/llvm/lib/Target/Hexagon/ |
| D | HexagonSelectCCInfo.td | 20 IntRegs:$fval, SETNE)),
80 // and similarly for SETNE
83 IntRegs:$fval, SETNE)),
|
| /external/llvm/lib/CodeGen/SelectionDAG/ |
| D | TargetLowering.cpp | 167 case ISD::SETNE: in softenSetCCOperands()
1293 (Cond != ISD::SETEQ && Cond != ISD::SETNE)) in simplifySetCCWithAnd()
1382 if ((Cond == ISD::SETEQ || Cond == ISD::SETNE) && in SimplifySetCC()
1387 Cond = ISD::SETNE; in SimplifySetCC()
1416 ISD::CondCode CC = Cond == ISD::SETULT ? ISD::SETEQ : ISD::SETNE; in SimplifySetCC()
1425 if ((Cond == ISD::SETEQ || Cond == ISD::SETNE) && in SimplifySetCC()
1493 (!N1C->isNullValue() && Cond == ISD::SETNE); in SimplifySetCC()
1582 case ISD::SETNE: return DAG.getConstant(1, dl, VT); in SimplifySetCC()
1599 case ISD::SETNE: in SimplifySetCC()
1622 (Cond == ISD::SETEQ || Cond == ISD::SETNE)) { in SimplifySetCC()
[all …]
|
| D | LegalizeIntegerTypes.cpp | 559 Ofl = DAG.getSetCC(dl, N->getValueType(1), Ofl, Res, ISD::SETNE); in PromoteIntRes_SADDSUBO()
751 Ofl = DAG.getSetCC(dl, N->getValueType(1), Ofl, Res, ISD::SETNE); in PromoteIntRes_UADDSUBO()
793 ISD::SETNE); in PromoteIntRes_XMULO()
798 Overflow = DAG.getSetCC(DL, N->getValueType(1), SExt, Mul, ISD::SETNE); in PromoteIntRes_XMULO()
950 case ISD::SETNE: { in PromoteSetCCOperands()
1967 DAG.getConstant(0, dl, NVT), ISD::SETNE); in ExpandIntRes_CTLZ()
1998 DAG.getConstant(0, dl, NVT), ISD::SETNE); in ExpandIntRes_CTTZ()
2285 ISD::SETEQ : ISD::SETNE); in ExpandIntRes_SADDSUBO()
2288 SDValue SumSignNE = DAG.getSetCC(dl, OType, LHSSign, SumSign, ISD::SETNE); in ExpandIntRes_SADDSUBO()
2562 ISD::SETNE); in ExpandIntRes_XMULO()
[all …]
|
| /external/llvm-project/llvm/lib/Target/VE/ |
| D | VEISelDAGToDAG.cpp | 33 case ISD::SETNE: in intCondCode2Icc()
64 case ISD::SETNE: in fpCondCode2Fcc()
|
| /external/llvm-project/llvm/lib/CodeGen/SelectionDAG/ |
| D | TargetLowering.cpp | 309 case ISD::SETNE: in softenSetCCOperands()
3122 (Cond != ISD::SETEQ && Cond != ISD::SETNE)) in foldSetCCWithAnd()
3212 NewCond = ISD::CondCode::SETNE; in optimizeSetCCOfSignedTruncationCheck()
3216 NewCond = ISD::CondCode::SETNE; in optimizeSetCCOfSignedTruncationCheck()
3275 assert((Cond == ISD::SETEQ || Cond == ISD::SETNE) && in optimizeSetCCByHoistingAndByConstFromLogicalShift()
3348 assert((Cond == ISD::SETEQ || Cond == ISD::SETNE) && "Unexpected condcode"); in foldSetCCWithBinOp()
3421 ISD::CondCode CC = Cond == ISD::SETULT ? ISD::SETEQ : ISD::SETNE; in simplifySetCCWithCTPOP()
3426 if ((Cond == ISD::SETEQ || Cond == ISD::SETNE) && C1 == 1) { in simplifySetCCWithCTPOP()
3502 if ((Cond == ISD::SETEQ || Cond == ISD::SETNE) && in SimplifySetCC()
3507 Cond = ISD::SETNE; in SimplifySetCC()
[all …]
|
| D | LegalizeIntegerTypes.cpp | 995 Ofl = DAG.getSetCC(dl, N->getValueType(1), Ofl, Res, ISD::SETNE); in PromoteIntRes_SADDSUBO()
1268 Ofl = DAG.getSetCC(dl, N->getValueType(1), Ofl, Res, ISD::SETNE); in PromoteIntRes_UADDSUBO()
1354 ISD::SETNE); in PromoteIntRes_XMULO()
1359 Overflow = DAG.getSetCC(DL, N->getValueType(1), SExt, Mul, ISD::SETNE); in PromoteIntRes_XMULO()
1561 case ISD::SETNE: { in PromoteSetCCOperands()
2935 DAG.getConstant(0, dl, NVT), ISD::SETNE); in ExpandIntRes_CTLZ()
2966 DAG.getConstant(0, dl, NVT), ISD::SETNE); in ExpandIntRes_CTTZ()
3485 SatMax = DAG.getSetCC(dl, BoolNVT, Tmp, NVTZero, ISD::SETNE); in ExpandIntRes_MULFIX()
3488 SatMax = DAG.getSetCC(dl, BoolNVT, ResultHH, NVTZero, ISD::SETNE); in ExpandIntRes_MULFIX()
3494 SatMax = DAG.getSetCC(dl, BoolNVT, HLAdjusted, NVTZero, ISD::SETNE); in ExpandIntRes_MULFIX()
[all …]
|
| /external/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/SelectionDAG/ |
| D | TargetLowering.cpp | 317 case ISD::SETNE: in softenSetCCOperands()
2856 (Cond != ISD::SETEQ && Cond != ISD::SETNE)) in foldSetCCWithAnd()
2946 NewCond = ISD::CondCode::SETNE; in optimizeSetCCOfSignedTruncationCheck()
2950 NewCond = ISD::CondCode::SETNE; in optimizeSetCCOfSignedTruncationCheck()
3009 assert((Cond == ISD::SETEQ || Cond == ISD::SETNE) && in optimizeSetCCByHoistingAndByConstFromLogicalShift()
3082 assert((Cond == ISD::SETEQ || Cond == ISD::SETNE) && "Unexpected condcode"); in foldSetCCWithBinOp()
3159 if ((Cond == ISD::SETEQ || Cond == ISD::SETNE) && in SimplifySetCC()
3164 Cond = ISD::SETNE; in SimplifySetCC()
3193 ISD::CondCode CC = Cond == ISD::SETULT ? ISD::SETEQ : ISD::SETNE; in SimplifySetCC()
3199 (Cond == ISD::SETEQ || Cond == ISD::SETNE)) { in SimplifySetCC()
[all …]
|
| D | LegalizeIntegerTypes.cpp | 870 Ofl = DAG.getSetCC(dl, N->getValueType(1), Ofl, Res, ISD::SETNE); in PromoteIntRes_SADDSUBO()
1081 Ofl = DAG.getSetCC(dl, N->getValueType(1), Ofl, Res, ISD::SETNE); in PromoteIntRes_UADDSUBO()
1161 ISD::SETNE); in PromoteIntRes_XMULO()
1166 Overflow = DAG.getSetCC(DL, N->getValueType(1), SExt, Mul, ISD::SETNE); in PromoteIntRes_XMULO()
1357 case ISD::SETNE: { in PromoteSetCCOperands()
2625 DAG.getConstant(0, dl, NVT), ISD::SETNE); in ExpandIntRes_CTLZ()
2656 DAG.getConstant(0, dl, NVT), ISD::SETNE); in ExpandIntRes_CTTZ()
3153 SatMax = DAG.getSetCC(dl, BoolNVT, Tmp, NVTZero, ISD::SETNE); in ExpandIntRes_MULFIX()
3156 SatMax = DAG.getSetCC(dl, BoolNVT, ResultHH, NVTZero, ISD::SETNE); in ExpandIntRes_MULFIX()
3162 SatMax = DAG.getSetCC(dl, BoolNVT, HLAdjusted, NVTZero, ISD::SETNE); in ExpandIntRes_MULFIX()
[all …]
|
| /external/mesa3d/src/mesa/x86/ |
| D | common_x86_asm.S | 65 SETNE (AL)
|
| /external/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/ |
| D | TargetLoweringBase.cpp | 542 CCs[RTLIB::UNE_F32] = ISD::SETNE; in InitCmpLibcallCCs()
543 CCs[RTLIB::UNE_F64] = ISD::SETNE; in InitCmpLibcallCCs()
544 CCs[RTLIB::UNE_F128] = ISD::SETNE; in InitCmpLibcallCCs()
545 CCs[RTLIB::UNE_PPCF128] = ISD::SETNE; in InitCmpLibcallCCs()
562 CCs[RTLIB::UO_F32] = ISD::SETNE; in InitCmpLibcallCCs()
563 CCs[RTLIB::UO_F64] = ISD::SETNE; in InitCmpLibcallCCs()
564 CCs[RTLIB::UO_F128] = ISD::SETNE; in InitCmpLibcallCCs()
565 CCs[RTLIB::UO_PPCF128] = ISD::SETNE; in InitCmpLibcallCCs()
|
| D | Analysis.cpp | 226 case ISD::SETONE: case ISD::SETUNE: return ISD::SETNE; in getFCmpCodeWithoutNaN()
241 case ICmpInst::ICMP_NE: return ISD::SETNE; in getICmpCondCode()
|
| /external/llvm/lib/CodeGen/ |
| D | TargetLoweringBase.cpp | 767 CCs[RTLIB::UNE_F32] = ISD::SETNE; in InitCmpLibcallCCs()
768 CCs[RTLIB::UNE_F64] = ISD::SETNE; in InitCmpLibcallCCs()
769 CCs[RTLIB::UNE_F128] = ISD::SETNE; in InitCmpLibcallCCs()
770 CCs[RTLIB::UNE_PPCF128] = ISD::SETNE; in InitCmpLibcallCCs()
787 CCs[RTLIB::UO_F32] = ISD::SETNE; in InitCmpLibcallCCs()
788 CCs[RTLIB::UO_F64] = ISD::SETNE; in InitCmpLibcallCCs()
789 CCs[RTLIB::UO_F128] = ISD::SETNE; in InitCmpLibcallCCs()
790 CCs[RTLIB::UO_PPCF128] = ISD::SETNE; in InitCmpLibcallCCs()
|
| D | Analysis.cpp | 187 case ISD::SETONE: case ISD::SETUNE: return ISD::SETNE; in getFCmpCodeWithoutNaN()
202 case ICmpInst::ICMP_NE: return ISD::SETNE; in getICmpCondCode()
|
| /external/llvm/include/llvm/CodeGen/ |
| D | ISDOpcodes.h | 875 SETNE, // 1 X 1 1 0 True if not equal enumerator
|
| /external/llvm-project/llvm/lib/CodeGen/ |
| D | TargetLoweringBase.cpp | 652 CCs[RTLIB::UNE_F32] = ISD::SETNE; in InitCmpLibcallCCs()
653 CCs[RTLIB::UNE_F64] = ISD::SETNE; in InitCmpLibcallCCs()
654 CCs[RTLIB::UNE_F128] = ISD::SETNE; in InitCmpLibcallCCs()
655 CCs[RTLIB::UNE_PPCF128] = ISD::SETNE; in InitCmpLibcallCCs()
672 CCs[RTLIB::UO_F32] = ISD::SETNE; in InitCmpLibcallCCs()
673 CCs[RTLIB::UO_F64] = ISD::SETNE; in InitCmpLibcallCCs()
674 CCs[RTLIB::UO_F128] = ISD::SETNE; in InitCmpLibcallCCs()
675 CCs[RTLIB::UO_PPCF128] = ISD::SETNE; in InitCmpLibcallCCs()
|
| D | Analysis.cpp | 227 case ISD::SETONE: case ISD::SETUNE: return ISD::SETNE; in getFCmpCodeWithoutNaN()
242 case ICmpInst::ICMP_NE: return ISD::SETNE; in getICmpCondCode()
|
| /external/swiftshader/third_party/llvm-10.0/llvm/include/llvm/CodeGen/ |
| D | ISDOpcodes.h | 1072 SETNE, // 1 X 1 1 0 True if not equal enumerator
|
| /external/llvm-project/llvm/include/llvm/CodeGen/ |
| D | ISDOpcodes.h | 1288 SETNE, // 1 X 1 1 0 True if not equal enumerator
|
| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/PowerPC/ |
| D | PPCISelDAGToDAG.cpp | 2929 case ISD::SETNE: { in get32BitZExtCompare()
3106 case ISD::SETNE: { in get32BitSExtCompare()
3273 case ISD::SETNE: { in get64BitZExtCompare()
3432 case ISD::SETNE: { in get64BitSExtCompare()
3702 if (CC == ISD::SETEQ || CC == ISD::SETNE) { in SelectCC()
3746 if (CC == ISD::SETEQ || CC == ISD::SETNE) { in SelectCC()
3795 case ISD::SETNE: in SelectCC()
3822 case ISD::SETNE: in SelectCC()
3868 case ISD::SETNE: in getPredicateForSetCC()
3909 case ISD::SETNE: Invert = true; return 2; // !Bit #2 = SETUNE in getCRIdxForSetCC()
[all …]
|
| /external/llvm-project/llvm/lib/Target/PowerPC/ |
| D | PPCISelDAGToDAG.cpp | 2889 case ISD::SETNE: { in get32BitZExtCompare()
3066 case ISD::SETNE: { in get32BitSExtCompare()
3233 case ISD::SETNE: { in get64BitZExtCompare()
3392 case ISD::SETNE: { in get64BitSExtCompare()
3668 if (CC == ISD::SETEQ || CC == ISD::SETNE) { in SelectCC()
3712 if (CC == ISD::SETEQ || CC == ISD::SETNE) { in SelectCC()
3761 case ISD::SETNE: in SelectCC()
3788 case ISD::SETNE: in SelectCC()
3839 case ISD::SETNE: in getPredicateForSetCC()
3880 case ISD::SETNE: Invert = true; return 2; // !Bit #2 = SETUNE in getCRIdxForSetCC()
[all …]
|
| /external/llvm/lib/Target/AMDGPU/ |
| D | AMDGPUInstructions.td | 91 [{return N->get() == ISD::SETONE || N->get() == ISD::SETNE;}]
133 [{return N->get() == ISD::SETUNE || N->get() == ISD::SETNE;}]
156 [{return N->get() == ISD::SETNE || N->get() == ISD::SETUNE;}]
|
| /external/llvm-project/llvm/lib/Target/AMDGPU/ |
| D | AMDGPUInstructions.td | 247 def COND_ONE : PatFrags<(ops), [(OtherVT SETONE), (OtherVT SETNE)]>;
268 def COND_UNE_NE : PatFrags<(ops), [(OtherVT SETUNE), (OtherVT SETNE)]>;
284 def COND_NE : PatFrags<(ops), [(OtherVT SETNE), (OtherVT SETUNE)]>;
|
| /external/llvm/lib/Target/WebAssembly/ |
| D | WebAssemblyInstrInteger.td | 44 defm NE : ComparisonInt<SETNE, "ne ">;
|
| /external/swiftshader/third_party/llvm-10.0/configs/common/lib/Target/PowerPC/ |
| D | PPCGenDAGISel.inc | 3542 /* 7501*/ OPC_CheckChild2CondCode, ISD::SETNE,
3552 …s1, (shl:{ *:[i32] } 1:{ *:[i32] }, i32:{ *:[i32] }:$sa)), 0:{ *:[i32] }, SETNE:{ *:[Other] })) - …
3557 /* 7539*/ OPC_CheckChild2CondCode, ISD::SETNE,
3567 …s1, (shl:{ *:[i64] } 1:{ *:[i64] }, i32:{ *:[i32] }:$sa)), 0:{ *:[i64] }, SETNE:{ *:[Other] })) - …
3581 /* 7589*/ OPC_CheckChild2CondCode, ISD::SETNE,
3591 …1:{ *:[i32] }, i32:{ *:[i32] }:$sa), i32:{ *:[i32] }:$s1), 0:{ *:[i32] }, SETNE:{ *:[Other] })) - …
3596 /* 7627*/ OPC_CheckChild2CondCode, ISD::SETNE,
3606 …1:{ *:[i64] }, i32:{ *:[i32] }:$sa), i64:{ *:[i64] }:$s1), 0:{ *:[i64] }, SETNE:{ *:[Other] })) - …
3621 /* 7680*/ OPC_CheckChild2CondCode, ISD::SETNE,
3633 …s1, (shl:{ *:[i64] } 1:{ *:[i64] }, i32:{ *:[i32] }:$sa)), 0:{ *:[i64] }, SETNE:{ *:[Other] })) - …
[all …]
|
| /external/llvm/lib/Target/X86/ |
| D | X86InstrCMovSetCC.td | 101 defm SETNE : SETCC<0x95, "setne", X86_COND_NE>; // not equal to
|