| /external/llvm/include/llvm/CodeGen/ |
| D | ISDOpcodes.h | 859 SETO, // 0 1 1 1 True if ordered (no nans) enumerator
|
| /external/swiftshader/third_party/llvm-10.0/llvm/include/llvm/CodeGen/ |
| D | ISDOpcodes.h | 1056 SETO, // 0 1 1 1 True if ordered (no nans) enumerator
|
| /external/llvm-project/llvm/include/llvm/CodeGen/ |
| D | ISDOpcodes.h | 1272 SETO, // 0 1 1 1 True if ordered (no nans) enumerator
|
| /external/llvm-project/llvm/lib/Target/VE/ |
| D | VEISelDAGToDAG.cpp | 79 case ISD::SETO: in fpCondCode2Fcc()
|
| /external/llvm/lib/Target/X86/ |
| D | X86InstrCMovSetCC.td | 96 defm SETO : SETCC<0x90, "seto", X86_COND_O>; // is overflow bit set
|
| /external/llvm-project/llvm/lib/Target/AMDGPU/ |
| D | SIInsertSkips.cpp | 302 case ISD::SETO: in kill()
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| D | AMDGPUInstructions.td | 252 def COND_O : PatFrags<(ops), [(OtherVT SETO)]>;
|
| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AMDGPU/ |
| D | SIInsertSkips.cpp | 219 case ISD::SETO: in kill()
|
| D | AMDGPUInstructions.td | 250 def COND_O : PatFrags<(ops), [(OtherVT SETO)]>;
|
| /external/llvm/lib/CodeGen/ |
| D | Analysis.cpp | 171 case FCmpInst::FCMP_ORD: return ISD::SETO; in getFCmpCondCode()
|
| /external/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/ |
| D | Analysis.cpp | 210 case FCmpInst::FCMP_ORD: return ISD::SETO; in getFCmpCondCode()
|
| /external/llvm-project/llvm/lib/CodeGen/ |
| D | Analysis.cpp | 211 case FCmpInst::FCMP_ORD: return ISD::SETO; in getFCmpCondCode()
|
| /external/llvm/lib/CodeGen/SelectionDAG/ |
| D | SelectionDAGDumper.cpp | 338 case ISD::SETO: return "seto"; in getOperationName()
|
| D | TargetLowering.cpp | 202 case ISD::SETO: in softenSetCCOperands()
1934 if (Cond == ISD::SETO || Cond == ISD::SETUO) in SimplifySetCC()
2000 ISD::CondCode NewCond = UOF == 0 ? ISD::SETO : ISD::SETUO; in SimplifySetCC()
|
| /external/llvm/lib/Target/WebAssembly/ |
| D | WebAssemblyISelLowering.cpp | 77 for (auto CC : {ISD::SETO, ISD::SETUO, ISD::SETUEQ, ISD::SETONE, in WebAssemblyTargetLowering()
|
| /external/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/SelectionDAG/ |
| D | SelectionDAGDumper.cpp | 415 case ISD::SETO: return "seto"; in getOperationName()
|
| /external/llvm-project/llvm/lib/CodeGen/SelectionDAG/ |
| D | SelectionDAGDumper.cpp | 436 case ISD::SETO: return "seto"; in getOperationName()
|
| /external/llvm/lib/Target/AMDGPU/ |
| D | AMDGPUInstructions.td | 115 def COND_O : PatLeaf <(cond), [{return N->get() == ISD::SETO;}]>;
|
| /external/llvm/include/llvm/Target/ |
| D | TargetSelectionDAG.td | 593 def SETONE : CondCode; def SETO : CondCode; def SETUO : CondCode;
985 (setcc node:$lhs, node:$rhs, SETO)>;
|
| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/PowerPC/ |
| D | PPCInstrQPX.td | 998 def : Pat<(setcc v4f64:$FRA, v4f64:$FRB, SETO),
1045 def : Pat<(setcc v4f32:$FRA, v4f32:$FRB, SETO),
|
| /external/llvm/lib/Target/PowerPC/ |
| D | PPCInstrQPX.td | 1001 def : Pat<(setcc v4f64:$FRA, v4f64:$FRB, SETO),
1048 def : Pat<(setcc v4f32:$FRA, v4f32:$FRB, SETO),
|
| /external/swiftshader/third_party/llvm-10.0/llvm/include/llvm/Target/ |
| D | TargetSelectionDAG.td | 690 def SETO : CondCode<"FCMP_ORD">;
1287 (setcc node:$lhs, node:$rhs, SETO)>;
|
| /external/llvm-project/llvm/include/llvm/Target/ |
| D | TargetSelectionDAG.td | 701 def SETO : CondCode<"FCMP_ORD">;
1294 (setcc node:$lhs, node:$rhs, SETO)>;
|
| /external/llvm-project/llvm/lib/Target/Lanai/ |
| D | LanaiISelLowering.cpp | 858 case ISD::SETO: in IntCondCCodeToICC()
|
| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Lanai/ |
| D | LanaiISelLowering.cpp | 858 case ISD::SETO: in IntCondCCodeToICC()
|