| /external/llvm/include/llvm/CodeGen/ |
| D | ISDOpcodes.h | 855 SETOGE, // 0 0 1 1 True if ordered and greater than or equal enumerator
|
| /external/swiftshader/third_party/llvm-10.0/llvm/include/llvm/CodeGen/ |
| D | ISDOpcodes.h | 1052 SETOGE, // 0 0 1 1 True if ordered and greater than or equal enumerator
|
| /external/llvm-project/llvm/include/llvm/CodeGen/ |
| D | ISDOpcodes.h | 1268 SETOGE, // 0 0 1 1 True if ordered and greater than or equal enumerator
|
| /external/llvm/lib/CodeGen/ |
| D | Analysis.cpp | 167 case FCmpInst::FCMP_OGE: return ISD::SETOGE; in getFCmpCondCode()
191 case ISD::SETOGE: case ISD::SETUGE: return ISD::SETGE; in getFCmpCodeWithoutNaN()
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| /external/llvm/lib/Target/WebAssembly/ |
| D | WebAssemblyInstrFloat.td | 60 defm GE : ComparisonFP<SETOGE, "ge ">;
|
| /external/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/ |
| D | Analysis.cpp | 206 case FCmpInst::FCMP_OGE: return ISD::SETOGE; in getFCmpCondCode()
230 case ISD::SETOGE: case ISD::SETUGE: return ISD::SETGE; in getFCmpCodeWithoutNaN()
|
| /external/llvm-project/llvm/lib/CodeGen/ |
| D | Analysis.cpp | 207 case FCmpInst::FCMP_OGE: return ISD::SETOGE; in getFCmpCondCode()
231 case ISD::SETOGE: case ISD::SETUGE: return ISD::SETGE; in getFCmpCodeWithoutNaN()
|
| /external/llvm-project/llvm/lib/Target/VE/ |
| D | VEISelDAGToDAG.cpp | 77 case ISD::SETOGE: in fpCondCode2Fcc()
|
| /external/llvm-project/llvm/lib/Target/AMDGPU/ |
| D | SIInsertSkips.cpp | 286 case ISD::SETOGE: in kill()
|
| D | AMDGPUInstructions.td | 249 def COND_OGE : PatFrags<(ops), [(OtherVT SETOGE), (OtherVT SETGE)]>;
|
| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/WebAssembly/ |
| D | WebAssemblyInstrFloat.td | 86 defm GE : ComparisonFP<SETOGE, "ge ", 0x60, 0x66>;
|
| /external/llvm-project/llvm/lib/Target/WebAssembly/ |
| D | WebAssemblyInstrFloat.td | 86 defm GE : ComparisonFP<SETOGE, "ge ", 0x60, 0x66>;
|
| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AMDGPU/ |
| D | SIInsertSkips.cpp | 203 case ISD::SETOGE: in kill()
|
| D | AMDGPUInstructions.td | 247 def COND_OGE : PatFrags<(ops), [(OtherVT SETOGE), (OtherVT SETGE)]>;
|
| /external/llvm/lib/CodeGen/SelectionDAG/ |
| D | SelectionDAGDumper.cpp | 333 case ISD::SETOGE: return "setoge"; in getOperationName()
|
| D | TargetLowering.cpp | 174 case ISD::SETOGE: in softenSetCCOperands()
1959 isCondCodeLegal(ISD::SETOGE, N0.getSimpleValueType())) in SimplifySetCC()
1960 return DAG.getSetCC(dl, VT, N0, N1, ISD::SETOGE); in SimplifySetCC()
1962 isCondCodeLegal(ISD::SETOGE, N0.getSimpleValueType())) in SimplifySetCC()
|
| /external/llvm/lib/Target/PowerPC/ |
| D | PPCISelDAGToDAG.cpp | 2094 case ISD::SETOGE: in getPredicateForSetCC()
2139 case ISD::SETOGE: in getCRIdxForSetCC()
2162 case ISD::SETOLE: CC = ISD::SETOGE; Swap = true; break; in getVCmpInst()
2173 case ISD::SETULT: CC = ISD::SETOGE; Negate = true; break; in getVCmpInst()
2193 case ISD::SETOGE: in getVCmpInst()
|
| /external/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/SelectionDAG/ |
| D | SelectionDAGDumper.cpp | 410 case ISD::SETOGE: return "setoge"; in getOperationName()
|
| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/PowerPC/ |
| D | PPCISelDAGToDAG.cpp | 3801 case ISD::SETOGE: in SelectCC()
3828 case ISD::SETOGE: in SelectCC()
3861 case ISD::SETOGE: in getPredicateForSetCC()
3912 case ISD::SETOGE: in getCRIdxForSetCC()
3935 case ISD::SETOLE: CC = ISD::SETOGE; Swap = true; break; in getVCmpInst()
3946 case ISD::SETULT: CC = ISD::SETOGE; Negate = true; break; in getVCmpInst()
3966 case ISD::SETOGE: in getVCmpInst()
|
| /external/llvm-project/llvm/lib/Target/PowerPC/ |
| D | PPCISelDAGToDAG.cpp | 3767 case ISD::SETOGE: in SelectCC()
3794 case ISD::SETOGE: in SelectCC()
3832 case ISD::SETOGE: in getPredicateForSetCC()
3883 case ISD::SETOGE: in getCRIdxForSetCC()
3907 case ISD::SETOLE: CC = ISD::SETOGE; Swap = true; break; in getVCmpInst()
3918 case ISD::SETULT: CC = ISD::SETOGE; Negate = true; break; in getVCmpInst()
3938 case ISD::SETOGE: in getVCmpInst()
|
| /external/llvm-project/llvm/lib/CodeGen/SelectionDAG/ |
| D | SelectionDAGDumper.cpp | 431 case ISD::SETOGE: return "setoge"; in getOperationName()
|
| /external/llvm/lib/Target/AMDGPU/ |
| D | AMDGPUInstructions.td | 101 [{return N->get() == ISD::SETOGE || N->get() == ISD::SETGE;}]
|
| D | AMDGPUISelLowering.cpp | 1011 case ISD::SETOGE: in CombineFMinMaxLegacy()
1307 SDValue cv = DAG.getSetCC(DL, SetCCVT, fr, fb, ISD::SETOGE); in LowerDIVREM24()
1748 SDValue Cmp = DAG.getSetCC(SL, SetCCVT, AbsDiff, Half, ISD::SETOGE); in LowerFROUND32()
|
| /external/llvm/include/llvm/Target/ |
| D | TargetSelectionDAG.td | 592 def SETOGE : CondCode; def SETOLT : CondCode; def SETOLE : CondCode;
977 (setcc node:$lhs, node:$rhs, SETOGE)>;
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| /external/llvm/lib/Target/Mips/ |
| D | MipsSEISelLowering.cpp | 191 setCondCodeAction(ISD::SETOGE, MVT::f32, Expand); in MipsSETargetLowering()
196 setCondCodeAction(ISD::SETOGE, MVT::f64, Expand); in MipsSETargetLowering()
323 setCondCodeAction(ISD::SETOGE, Ty, Expand); in addMSAFloatType()
|