/external/llvm/include/llvm/CodeGen/ |
D | ISDOpcodes.h | 858 SETONE, // 0 1 1 0 True if ordered and operands are unequal enumerator
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/external/swiftshader/third_party/llvm-10.0/llvm/include/llvm/CodeGen/ |
D | ISDOpcodes.h | 1055 SETONE, // 0 1 1 0 True if ordered and operands are unequal enumerator
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/external/llvm-project/llvm/include/llvm/CodeGen/ |
D | ISDOpcodes.h | 1271 SETONE, // 0 1 1 0 True if ordered and operands are unequal enumerator
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/external/llvm/lib/CodeGen/ |
D | Analysis.cpp | 170 case FCmpInst::FCMP_ONE: return ISD::SETONE; in getFCmpCondCode() 187 case ISD::SETONE: case ISD::SETUNE: return ISD::SETNE; in getFCmpCodeWithoutNaN()
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/external/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/ |
D | Analysis.cpp | 209 case FCmpInst::FCMP_ONE: return ISD::SETONE; in getFCmpCondCode() 226 case ISD::SETONE: case ISD::SETUNE: return ISD::SETNE; in getFCmpCodeWithoutNaN()
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/external/llvm-project/llvm/lib/CodeGen/ |
D | Analysis.cpp | 210 case FCmpInst::FCMP_ONE: return ISD::SETONE; in getFCmpCondCode() 227 case ISD::SETONE: case ISD::SETUNE: return ISD::SETNE; in getFCmpCodeWithoutNaN()
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/external/llvm-project/llvm/lib/Target/VE/ |
D | VEISelDAGToDAG.cpp | 65 case ISD::SETONE: in fpCondCode2Fcc()
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/external/llvm-project/llvm/lib/Target/AMDGPU/ |
D | SIInsertSkips.cpp | 298 case ISD::SETONE: in kill()
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D | AMDGPUInstructions.td | 247 def COND_ONE : PatFrags<(ops), [(OtherVT SETONE), (OtherVT SETNE)]>;
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D | R600ISelLowering.cpp | 132 setCondCodeAction(ISD::SETONE, MVT::f32, Expand); in R600TargetLowering() 1045 case ISD::SETONE: in LowerSELECT_CC()
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/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AMDGPU/ |
D | SIInsertSkips.cpp | 215 case ISD::SETONE: in kill()
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D | AMDGPUInstructions.td | 245 def COND_ONE : PatFrags<(ops), [(OtherVT SETONE), (OtherVT SETNE)]>;
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D | R600ISelLowering.cpp | 132 setCondCodeAction(ISD::SETONE, MVT::f32, Expand); in R600TargetLowering() 1040 case ISD::SETONE: in LowerSELECT_CC()
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/external/llvm/lib/CodeGen/SelectionDAG/ |
D | SelectionDAGDumper.cpp | 336 case ISD::SETONE: return "setone"; in getOperationName()
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D | TargetLowering.cpp | 207 case ISD::SETONE: in softenSetCCOperands() 1954 if (Cond == ISD::SETONE && in SimplifySetCC() 1967 if (Cond == ISD::SETONE && in SimplifySetCC()
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/external/llvm/lib/Target/WebAssembly/ |
D | WebAssemblyISelLowering.cpp | 77 for (auto CC : {ISD::SETO, ISD::SETUO, ISD::SETUEQ, ISD::SETONE, in WebAssemblyTargetLowering()
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/external/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/SelectionDAG/ |
D | SelectionDAGDumper.cpp | 413 case ISD::SETONE: return "setone"; in getOperationName()
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/external/llvm-project/llvm/lib/CodeGen/SelectionDAG/ |
D | SelectionDAGDumper.cpp | 434 case ISD::SETONE: return "setone"; in getOperationName()
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/external/llvm/lib/Target/AMDGPU/ |
D | AMDGPUInstructions.td | 91 [{return N->get() == ISD::SETONE || N->get() == ISD::SETNE;}]
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D | AMDGPUISelLowering.cpp | 966 case ISD::SETONE: in CombineFMinMaxLegacy() 1620 SDValue NeTrunc = DAG.getSetCC(SL, SetCCVT, Src, Trunc, ISD::SETONE); in LowerFCEIL() 1841 SDValue NeTrunc = DAG.getSetCC(SL, SetCCVT, Src, Trunc, ISD::SETONE); in LowerFFLOOR()
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D | R600ISelLowering.cpp | 95 setCondCodeAction(ISD::SETONE, MVT::f32, Expand); in R600TargetLowering() 1207 case ISD::SETONE: in LowerSELECT_CC()
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/external/llvm/include/llvm/Target/ |
D | TargetSelectionDAG.td | 593 def SETONE : CondCode; def SETO : CondCode; def SETUO : CondCode; 983 (setcc node:$lhs, node:$rhs, SETONE)>;
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/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/PowerPC/ |
D | PPCInstrQPX.td | 995 def : Pat<(setcc v4f64:$FRA, v4f64:$FRB, SETONE), 1042 def : Pat<(setcc v4f32:$FRA, v4f32:$FRB, SETONE),
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/external/llvm/lib/Target/PowerPC/ |
D | PPCInstrQPX.td | 998 def : Pat<(setcc v4f64:$FRA, v4f64:$FRB, SETONE), 1045 def : Pat<(setcc v4f32:$FRA, v4f32:$FRB, SETONE),
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/external/swiftshader/third_party/llvm-10.0/llvm/include/llvm/Target/ |
D | TargetSelectionDAG.td | 689 def SETONE : CondCode<"FCMP_ONE">; 1285 (setcc node:$lhs, node:$rhs, SETONE)>;
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