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Searched refs:SETULE (Results 1 – 25 of 129) sorted by relevance

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/external/llvm/include/llvm/CodeGen/
DISDOpcodes.h865 SETULE, // 1 1 0 1 True if unordered, less than, or equal enumerator
890 return Code == SETUGT || Code == SETUGE || Code == SETULT || Code == SETULE; in isUnsignedIntSetCC()
/external/swiftshader/third_party/llvm-10.0/llvm/include/llvm/CodeGen/
DISDOpcodes.h1062 SETULE, // 1 1 0 1 True if unordered, less than, or equal enumerator
1087 return Code == SETUGT || Code == SETUGE || Code == SETULT || Code == SETULE; in isUnsignedIntSetCC()
/external/llvm-project/llvm/include/llvm/CodeGen/
DISDOpcodes.h1278 SETULE, // 1 1 0 1 True if unordered, less than, or equal enumerator
1303 return Code == SETUGT || Code == SETUGE || Code == SETULT || Code == SETULE; in isUnsignedIntSetCC()
/external/llvm-project/llvm/lib/Target/VE/
DVEISelDAGToDAG.cpp45 case ISD::SETULE: in intCondCode2Icc()
91 case ISD::SETULE: in fpCondCode2Fcc()
/external/llvm/lib/CodeGen/
DAnalysis.cpp177 case FCmpInst::FCMP_ULE: return ISD::SETULE; in getFCmpCondCode()
189 case ISD::SETOLE: case ISD::SETULE: return ISD::SETLE; in getFCmpCodeWithoutNaN()
204 case ICmpInst::ICMP_ULE: return ISD::SETULE; in getICmpCondCode()
/external/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/
DAnalysis.cpp216 case FCmpInst::FCMP_ULE: return ISD::SETULE; in getFCmpCondCode()
228 case ISD::SETOLE: case ISD::SETULE: return ISD::SETLE; in getFCmpCodeWithoutNaN()
243 case ICmpInst::ICMP_ULE: return ISD::SETULE; in getICmpCondCode()
/external/llvm-project/llvm/lib/CodeGen/
DAnalysis.cpp217 case FCmpInst::FCMP_ULE: return ISD::SETULE; in getFCmpCondCode()
229 case ISD::SETOLE: case ISD::SETULE: return ISD::SETLE; in getFCmpCodeWithoutNaN()
244 case ICmpInst::ICMP_ULE: return ISD::SETULE; in getICmpCondCode()
/external/llvm/lib/Target/WebAssembly/
DWebAssemblyInstrInteger.td49 defm LE_U : ComparisonInt<SETULE, "le_u">;
/external/llvm/lib/Target/Hexagon/
DHexagonSelectCCInfo.td54 IntRegs:$fval, SETULE)),
/external/llvm/lib/CodeGen/SelectionDAG/
DTargetLowering.cpp233 case ISD::SETULE: in softenSetCCOperands()
1581 case ISD::SETULE: in SimplifySetCC()
1603 case ISD::SETULE: { in SimplifySetCC()
1763 if (Cond == ISD::SETLE || Cond == ISD::SETULE) { in SimplifySetCC()
1784 if ((Cond == ISD::SETLE || Cond == ISD::SETULE) && C1 == MaxVal) in SimplifySetCC()
1877 Cond == ISD::SETULE || Cond == ISD::SETUGT) { in SimplifySetCC()
1878 bool AdjOne = (Cond == ISD::SETULE || Cond == ISD::SETUGT); in SimplifySetCC()
1889 NewCond = (Cond == ISD::SETULE) ? ISD::SETULT : ISD::SETUGE; in SimplifySetCC()
1950 return DAG.getSetCC(dl, VT, N0, N1, ISD::SETULE); in SimplifySetCC()
2156 case ISD::SETULE: // X <=u Y --> X == 0 | Y == 1 --> ~X | Y in SimplifySetCC()
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/BPF/
DBPFISelLowering.cpp489 case ISD::SETULE: in NegateCC()
696 SET_NEWCC(SETULE, JULE); in EmitInstrWithCustomInserter()
/external/llvm-project/llvm/lib/Target/AMDGPU/
DSIInsertSkips.cpp320 case ISD::SETULE: in kill()
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/WebAssembly/
DWebAssemblyInstrInteger.td81 defm LE_U : ComparisonInt<SETULE, "le_u", 0x4d, 0x58>;
/external/llvm-project/llvm/lib/Target/WebAssembly/
DWebAssemblyInstrInteger.td81 defm LE_U : ComparisonInt<SETULE, "le_u", 0x4d, 0x58>;
/external/llvm-project/llvm/lib/Target/BPF/
DBPFISelLowering.cpp522 case ISD::SETULE: in NegateCC()
735 SET_NEWCC(SETULE, JULE); in EmitInstrWithCustomInserter()
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/PowerPC/
DPPCISelDAGToDAG.cpp3041 case ISD::SETULE: { in get32BitZExtCompare()
3214 case ISD::SETULE: { in get32BitSExtCompare()
3373 case ISD::SETULE: { in get64BitZExtCompare()
3536 case ISD::SETULE: { in get64BitSExtCompare()
3811 case ISD::SETULE: in SelectCC()
3838 case ISD::SETULE: in SelectCC()
3873 case ISD::SETULE: in getPredicateForSetCC()
3906 case ISD::SETULE: in getCRIdxForSetCC()
3937 case ISD::SETUGE: CC = ISD::SETULE; Swap = true; break; in getVCmpInst()
3945 case ISD::SETULE: CC = ISD::SETOGT; Negate = true; break; in getVCmpInst()
[all …]
DPPCInstrQPX.td1013 def : Pat<(setcc v4f64:$FRA, v4f64:$FRB, SETULE),
1060 def : Pat<(setcc v4f32:$FRA, v4f32:$FRB, SETULE),
1120 def : Pat<(v4f64 (selectcc i1:$lhs, i1:$rhs, v4f64:$tval, v4f64:$fval, SETULE)),
1141 def : Pat<(v4f32 (selectcc i1:$lhs, i1:$rhs, v4f32:$tval, v4f32:$fval, SETULE)),
1162 def : Pat<(v4i1 (selectcc i1:$lhs, i1:$rhs, v4i1:$tval, v4i1:$fval, SETULE)),
DPPCInstrInfo.td3405 def : Pat<(i1 (setcc i1:$s1, i1:$s2, SETULE)),
3711 defm : CRNotPat<(i1 (setcc i32:$s1, immZExt16:$imm, SETULE)),
3728 defm : CRNotPat<(i1 (setcc i32:$s1, i32:$s2, SETULE)),
3740 defm : CRNotPat<(i1 (setcc i64:$s1, immZExt16:$imm, SETULE)),
3757 defm : CRNotPat<(i1 (setcc i64:$s1, i64:$s2, SETULE)),
3770 defm : CRNotPat<(i1 (setcc f32:$s1, f32:$s2, SETULE)),
3786 defm : CRNotPat<(i1 (setcc f64:$s1, f64:$s2, SETULE)),
3802 defm : CRNotPat<(i1 (setcc f128:$s1, f128:$s2, SETULE)),
3886 defm : CRNotPat<(i1 (setcc f32:$s1, f32:$s2, SETULE)),
3913 defm : CRNotPat<(i1 (setcc f64:$s1, f64:$s2, SETULE)),
[all …]
/external/llvm-project/llvm/lib/Target/PowerPC/
DPPCISelDAGToDAG.cpp3001 case ISD::SETULE: { in get32BitZExtCompare()
3174 case ISD::SETULE: { in get32BitSExtCompare()
3333 case ISD::SETULE: { in get64BitZExtCompare()
3496 case ISD::SETULE: { in get64BitSExtCompare()
3777 case ISD::SETULE: in SelectCC()
3804 case ISD::SETULE: in SelectCC()
3844 case ISD::SETULE: in getPredicateForSetCC()
3877 case ISD::SETULE: in getCRIdxForSetCC()
3909 case ISD::SETUGE: CC = ISD::SETULE; Swap = true; break; in getVCmpInst()
3917 case ISD::SETULE: CC = ISD::SETOGT; Negate = true; break; in getVCmpInst()
[all …]
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AMDGPU/
DSIInsertSkips.cpp237 case ISD::SETULE: in kill()
/external/llvm/lib/Target/PowerPC/
DPPCInstrQPX.td1016 def : Pat<(setcc v4f64:$FRA, v4f64:$FRB, SETULE),
1063 def : Pat<(setcc v4f32:$FRA, v4f32:$FRB, SETULE),
1123 def : Pat<(v4f64 (selectcc i1:$lhs, i1:$rhs, v4f64:$tval, v4f64:$fval, SETULE)),
1144 def : Pat<(v4f32 (selectcc i1:$lhs, i1:$rhs, v4f32:$tval, v4f32:$fval, SETULE)),
1165 def : Pat<(v4i1 (selectcc i1:$lhs, i1:$rhs, v4i1:$tval, v4i1:$fval, SETULE)),
DPPCISelDAGToDAG.cpp2103 case ISD::SETULE: in getPredicateForSetCC()
2133 case ISD::SETULE: in getCRIdxForSetCC()
2164 case ISD::SETUGE: CC = ISD::SETULE; Swap = true; break; in getVCmpInst()
2172 case ISD::SETULE: CC = ISD::SETOGT; Negate = true; break; in getVCmpInst()
2208 case ISD::SETUGE: CC = ISD::SETULE; Swap = true; break; in getVCmpInst()
2217 case ISD::SETULE: CC = ISD::SETUGT; Negate = true; break; in getVCmpInst()
/external/swiftshader/third_party/llvm-10.0/configs/common/lib/Target/PowerPC/
DPPCGenDAGISel.inc4336 /* 9571*/ OPC_CheckChild2CondCode, ISD::SETULE,
4354 …:[i32] }:$s1, (imm:{ *:[i32] })<<P:Predicate_immZExt16>><<X:LO16>>:$imm, SETULE:{ *:[Other] })) - …
4374 …:[i32] }:$s1, (imm:{ *:[i32] })<<P:Predicate_immZExt16>><<X:LO16>>:$imm, SETULE:{ *:[Other] })) - …
4644 /* 10413*/ OPC_CheckChild2CondCode, ISD::SETULE,
4661 …:{ *:[i32] } (setcc:{ *:[i1] } i32:{ *:[i32] }:$s1, i32:{ *:[i32] }:$s2, SETULE:{ *:[Other] })) - …
4680 …:{ *:[i64] } (setcc:{ *:[i1] } i32:{ *:[i32] }:$s1, i32:{ *:[i32] }:$s2, SETULE:{ *:[Other] })) - …
5169 /* 11800*/ OPC_CheckChild2CondCode, ISD::SETULE,
5187 …:[i64] }:$s1, (imm:{ *:[i64] })<<P:Predicate_immZExt16>><<X:LO16>>:$imm, SETULE:{ *:[Other] })) - …
5207 …:[i64] }:$s1, (imm:{ *:[i64] })<<P:Predicate_immZExt16>><<X:LO16>>:$imm, SETULE:{ *:[Other] })) - …
5478 /* 12644*/ OPC_CheckChild2CondCode, ISD::SETULE,
[all …]
/external/llvm-project/llvm/lib/CodeGen/SelectionDAG/
DTargetLowering.cpp368 case ISD::SETULE: in softenSetCCOperands()
3207 } else if (Cond == ISD::CondCode::SETULE) { in optimizeSetCCOfSignedTruncationCheck()
3680 case ISD::SETULE: in SimplifySetCC()
3703 case ISD::SETULE: { in SimplifySetCC()
3896 if (Cond == ISD::SETLE || Cond == ISD::SETULE) { in SimplifySetCC()
3975 (Cond == ISD::SETULE && C1.isMaxSignedValue())) in SimplifySetCC()
4044 Cond == ISD::SETULE || Cond == ISD::SETUGT) { in SimplifySetCC()
4045 bool AdjOne = (Cond == ISD::SETULE || Cond == ISD::SETUGT); in SimplifySetCC()
4056 NewCond = (Cond == ISD::SETULE) ? ISD::SETULT : ISD::SETUGE; in SimplifySetCC()
4105 case ISD::SETUEQ: NewCond = IsNegInf ? ISD::SETULE : ISD::SETUGE; break; in SimplifySetCC()
[all …]
/external/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/SelectionDAG/
DTargetLowering.cpp376 case ISD::SETULE: in softenSetCCOperands()
2941 } else if (Cond == ISD::CondCode::SETULE) { in optimizeSetCCOfSignedTruncationCheck()
3375 case ISD::SETULE: in SimplifySetCC()
3398 case ISD::SETULE: { in SimplifySetCC()
3591 if (Cond == ISD::SETLE || Cond == ISD::SETULE) { in SimplifySetCC()
3734 Cond == ISD::SETULE || Cond == ISD::SETUGT) { in SimplifySetCC()
3735 bool AdjOne = (Cond == ISD::SETULE || Cond == ISD::SETUGT); in SimplifySetCC()
3746 NewCond = (Cond == ISD::SETULE) ? ISD::SETULT : ISD::SETUGE; in SimplifySetCC()
3797 return DAG.getSetCC(dl, VT, N0, N1, ISD::SETULE); in SimplifySetCC()
3972 case ISD::SETULE: // X <=u Y --> X == 0 | Y == 1 --> ~X | Y in SimplifySetCC()
[all …]

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