/external/ms-tpm-20-ref/Samples/Nucleo-TPM/L476RG/Drivers/STM32L4xx_HAL_Driver/Inc/ |
D | stm32l4xx_hal_rcc.h | 627 SET_BIT(RCC->AHB1ENR, RCC_AHB1ENR_DMA1EN); \ 635 SET_BIT(RCC->AHB1ENR, RCC_AHB1ENR_DMA2EN); \ 644 SET_BIT(RCC->AHB1ENR, RCC_AHB1ENR_DMAMUX1EN); \ 653 SET_BIT(RCC->AHB1ENR, RCC_AHB1ENR_FLASHEN); \ 661 SET_BIT(RCC->AHB1ENR, RCC_AHB1ENR_CRCEN); \ 669 SET_BIT(RCC->AHB1ENR, RCC_AHB1ENR_TSCEN); \ 678 SET_BIT(RCC->AHB1ENR, RCC_AHB1ENR_DMA2DEN); \ 688 SET_BIT(RCC->AHB1ENR, RCC_AHB1ENR_GFXMMUEN); \ 732 SET_BIT(RCC->AHB2ENR, RCC_AHB2ENR_GPIOAEN); \ 740 SET_BIT(RCC->AHB2ENR, RCC_AHB2ENR_GPIOBEN); \ [all …]
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D | stm32l4xx_hal.h | 252 #define __HAL_DBGMCU_FREEZE_TIM2() SET_BIT(DBGMCU->APB1FZR1, DBGMCU_APB1FZR1_DBG_TIM2_STO… 257 #define __HAL_DBGMCU_FREEZE_TIM3() SET_BIT(DBGMCU->APB1FZR1, DBGMCU_APB1FZR1_DBG_TIM3_STO… 262 #define __HAL_DBGMCU_FREEZE_TIM4() SET_BIT(DBGMCU->APB1FZR1, DBGMCU_APB1FZR1_DBG_TIM4_STO… 267 #define __HAL_DBGMCU_FREEZE_TIM5() SET_BIT(DBGMCU->APB1FZR1, DBGMCU_APB1FZR1_DBG_TIM5_STO… 272 #define __HAL_DBGMCU_FREEZE_TIM6() SET_BIT(DBGMCU->APB1FZR1, DBGMCU_APB1FZR1_DBG_TIM6_STO… 277 #define __HAL_DBGMCU_FREEZE_TIM7() SET_BIT(DBGMCU->APB1FZR1, DBGMCU_APB1FZR1_DBG_TIM7_STO… 282 #define __HAL_DBGMCU_FREEZE_RTC() SET_BIT(DBGMCU->APB1FZR1, DBGMCU_APB1FZR1_DBG_RTC_STOP) 287 #define __HAL_DBGMCU_FREEZE_WWDG() SET_BIT(DBGMCU->APB1FZR1, DBGMCU_APB1FZR1_DBG_WWDG_STO… 292 #define __HAL_DBGMCU_FREEZE_IWDG() SET_BIT(DBGMCU->APB1FZR1, DBGMCU_APB1FZR1_DBG_IWDG_STO… 297 #define __HAL_DBGMCU_FREEZE_I2C1_TIMEOUT() SET_BIT(DBGMCU->APB1FZR1, DBGMCU_APB1FZR1_DBG_I2C1_STO… [all …]
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D | stm32l4xx_hal_pwr_ex.h | 312 #define __HAL_PWR_PVM1_EXTI_ENABLE_IT() SET_BIT(EXTI->IMR2, PWR_EXTI_LINE_PVM1) 324 #define __HAL_PWR_PVM1_EXTI_ENABLE_EVENT() SET_BIT(EXTI->EMR2, PWR_EVENT_LINE_PVM1) 336 #define __HAL_PWR_PVM1_EXTI_ENABLE_RISING_EDGE() SET_BIT(EXTI->RTSR2, PWR_EXTI_LINE_PVM1) 348 #define __HAL_PWR_PVM1_EXTI_ENABLE_FALLING_EDGE() SET_BIT(EXTI->FTSR2, PWR_EXTI_LINE_PVM1) 382 #define __HAL_PWR_PVM1_EXTI_GENERATE_SWIT() SET_BIT(EXTI->SWIER2, PWR_EXTI_LINE_PVM1) 404 #define __HAL_PWR_PVM2_EXTI_ENABLE_IT() SET_BIT(EXTI->IMR2, PWR_EXTI_LINE_PVM2) 416 #define __HAL_PWR_PVM2_EXTI_ENABLE_EVENT() SET_BIT(EXTI->EMR2, PWR_EVENT_LINE_PVM2) 428 #define __HAL_PWR_PVM2_EXTI_ENABLE_RISING_EDGE() SET_BIT(EXTI->RTSR2, PWR_EXTI_LINE_PVM2) 440 #define __HAL_PWR_PVM2_EXTI_ENABLE_FALLING_EDGE() SET_BIT(EXTI->FTSR2, PWR_EXTI_LINE_PVM2) 474 #define __HAL_PWR_PVM2_EXTI_GENERATE_SWIT() SET_BIT(EXTI->SWIER2, PWR_EXTI_LINE_PVM2) [all …]
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D | stm32l4xx_hal_pwr.h | 237 #define __HAL_PWR_PVD_EXTI_ENABLE_IT() SET_BIT(EXTI->IMR1, PWR_EXTI_LINE_PVD) 249 #define __HAL_PWR_PVD_EXTI_ENABLE_EVENT() SET_BIT(EXTI->EMR1, PWR_EVENT_LINE_PVD) 261 #define __HAL_PWR_PVD_EXTI_ENABLE_RISING_EDGE() SET_BIT(EXTI->RTSR1, PWR_EXTI_LINE_PVD) 273 #define __HAL_PWR_PVD_EXTI_ENABLE_FALLING_EDGE() SET_BIT(EXTI->FTSR1, PWR_EXTI_LINE_PVD) 307 #define __HAL_PWR_PVD_EXTI_GENERATE_SWIT() SET_BIT(EXTI->SWIER1, PWR_EXTI_LINE_PVD)
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D | stm32l4xx_hal_flash.h | 597 #define __HAL_FLASH_PREFETCH_BUFFER_ENABLE() SET_BIT(FLASH->ACR, FLASH_ACR_PRFTEN) 609 #define __HAL_FLASH_INSTRUCTION_CACHE_ENABLE() SET_BIT(FLASH->ACR, FLASH_ACR_ICEN) 621 #define __HAL_FLASH_DATA_CACHE_ENABLE() SET_BIT(FLASH->ACR, FLASH_ACR_DCEN) 634 #define __HAL_FLASH_INSTRUCTION_CACHE_RESET() do { SET_BIT(FLASH->ACR, FLASH_ACR_ICRST); \ 643 #define __HAL_FLASH_DATA_CACHE_RESET() do { SET_BIT(FLASH->ACR, FLASH_ACR_DCRST); \ 654 SET_BIT(FLASH->ACR, FLASH_ACR_RUN_PD); \ 671 #define __HAL_FLASH_SLEEP_POWERDOWN_ENABLE() SET_BIT(FLASH->ACR, FLASH_ACR_SLEEP_PD) 698 #define __HAL_FLASH_ENABLE_IT(__INTERRUPT__) do { if((__INTERRUPT__) & FLASH_IT_ECCC) { SET_BIT(… 699 …if((__INTERRUPT__) & (~FLASH_IT_ECCC)) { SET_BIT(FLASH->CR, ((__INTERRUPT__) & (~FLASH_IT_ECCC)));… 761 …AG__) do { if((__FLAG__) & (FLASH_FLAG_ECCC | FLASH_FLAG_ECCD)) { SET_BIT(FLASH->ECCR, ((__…
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/external/ms-tpm-20-ref/Samples/Nucleo-TPM/L4A6RG/Drivers/STM32L4xx_HAL_Driver/Inc/ |
D | stm32l4xx_hal_rcc.h | 627 SET_BIT(RCC->AHB1ENR, RCC_AHB1ENR_DMA1EN); \ 635 SET_BIT(RCC->AHB1ENR, RCC_AHB1ENR_DMA2EN); \ 644 SET_BIT(RCC->AHB1ENR, RCC_AHB1ENR_DMAMUX1EN); \ 653 SET_BIT(RCC->AHB1ENR, RCC_AHB1ENR_FLASHEN); \ 661 SET_BIT(RCC->AHB1ENR, RCC_AHB1ENR_CRCEN); \ 669 SET_BIT(RCC->AHB1ENR, RCC_AHB1ENR_TSCEN); \ 678 SET_BIT(RCC->AHB1ENR, RCC_AHB1ENR_DMA2DEN); \ 688 SET_BIT(RCC->AHB1ENR, RCC_AHB1ENR_GFXMMUEN); \ 732 SET_BIT(RCC->AHB2ENR, RCC_AHB2ENR_GPIOAEN); \ 740 SET_BIT(RCC->AHB2ENR, RCC_AHB2ENR_GPIOBEN); \ [all …]
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D | stm32l4xx_hal.h | 252 #define __HAL_DBGMCU_FREEZE_TIM2() SET_BIT(DBGMCU->APB1FZR1, DBGMCU_APB1FZR1_DBG_TIM2_STO… 257 #define __HAL_DBGMCU_FREEZE_TIM3() SET_BIT(DBGMCU->APB1FZR1, DBGMCU_APB1FZR1_DBG_TIM3_STO… 262 #define __HAL_DBGMCU_FREEZE_TIM4() SET_BIT(DBGMCU->APB1FZR1, DBGMCU_APB1FZR1_DBG_TIM4_STO… 267 #define __HAL_DBGMCU_FREEZE_TIM5() SET_BIT(DBGMCU->APB1FZR1, DBGMCU_APB1FZR1_DBG_TIM5_STO… 272 #define __HAL_DBGMCU_FREEZE_TIM6() SET_BIT(DBGMCU->APB1FZR1, DBGMCU_APB1FZR1_DBG_TIM6_STO… 277 #define __HAL_DBGMCU_FREEZE_TIM7() SET_BIT(DBGMCU->APB1FZR1, DBGMCU_APB1FZR1_DBG_TIM7_STO… 282 #define __HAL_DBGMCU_FREEZE_RTC() SET_BIT(DBGMCU->APB1FZR1, DBGMCU_APB1FZR1_DBG_RTC_STOP) 287 #define __HAL_DBGMCU_FREEZE_WWDG() SET_BIT(DBGMCU->APB1FZR1, DBGMCU_APB1FZR1_DBG_WWDG_STO… 292 #define __HAL_DBGMCU_FREEZE_IWDG() SET_BIT(DBGMCU->APB1FZR1, DBGMCU_APB1FZR1_DBG_IWDG_STO… 297 #define __HAL_DBGMCU_FREEZE_I2C1_TIMEOUT() SET_BIT(DBGMCU->APB1FZR1, DBGMCU_APB1FZR1_DBG_I2C1_STO… [all …]
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D | stm32l4xx_hal_pwr_ex.h | 312 #define __HAL_PWR_PVM1_EXTI_ENABLE_IT() SET_BIT(EXTI->IMR2, PWR_EXTI_LINE_PVM1) 324 #define __HAL_PWR_PVM1_EXTI_ENABLE_EVENT() SET_BIT(EXTI->EMR2, PWR_EVENT_LINE_PVM1) 336 #define __HAL_PWR_PVM1_EXTI_ENABLE_RISING_EDGE() SET_BIT(EXTI->RTSR2, PWR_EXTI_LINE_PVM1) 348 #define __HAL_PWR_PVM1_EXTI_ENABLE_FALLING_EDGE() SET_BIT(EXTI->FTSR2, PWR_EXTI_LINE_PVM1) 382 #define __HAL_PWR_PVM1_EXTI_GENERATE_SWIT() SET_BIT(EXTI->SWIER2, PWR_EXTI_LINE_PVM1) 404 #define __HAL_PWR_PVM2_EXTI_ENABLE_IT() SET_BIT(EXTI->IMR2, PWR_EXTI_LINE_PVM2) 416 #define __HAL_PWR_PVM2_EXTI_ENABLE_EVENT() SET_BIT(EXTI->EMR2, PWR_EVENT_LINE_PVM2) 428 #define __HAL_PWR_PVM2_EXTI_ENABLE_RISING_EDGE() SET_BIT(EXTI->RTSR2, PWR_EXTI_LINE_PVM2) 440 #define __HAL_PWR_PVM2_EXTI_ENABLE_FALLING_EDGE() SET_BIT(EXTI->FTSR2, PWR_EXTI_LINE_PVM2) 474 #define __HAL_PWR_PVM2_EXTI_GENERATE_SWIT() SET_BIT(EXTI->SWIER2, PWR_EXTI_LINE_PVM2) [all …]
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D | stm32l4xx_hal_pwr.h | 237 #define __HAL_PWR_PVD_EXTI_ENABLE_IT() SET_BIT(EXTI->IMR1, PWR_EXTI_LINE_PVD) 249 #define __HAL_PWR_PVD_EXTI_ENABLE_EVENT() SET_BIT(EXTI->EMR1, PWR_EVENT_LINE_PVD) 261 #define __HAL_PWR_PVD_EXTI_ENABLE_RISING_EDGE() SET_BIT(EXTI->RTSR1, PWR_EXTI_LINE_PVD) 273 #define __HAL_PWR_PVD_EXTI_ENABLE_FALLING_EDGE() SET_BIT(EXTI->FTSR1, PWR_EXTI_LINE_PVD) 307 #define __HAL_PWR_PVD_EXTI_GENERATE_SWIT() SET_BIT(EXTI->SWIER1, PWR_EXTI_LINE_PVD)
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D | stm32l4xx_hal_flash.h | 597 #define __HAL_FLASH_PREFETCH_BUFFER_ENABLE() SET_BIT(FLASH->ACR, FLASH_ACR_PRFTEN) 609 #define __HAL_FLASH_INSTRUCTION_CACHE_ENABLE() SET_BIT(FLASH->ACR, FLASH_ACR_ICEN) 621 #define __HAL_FLASH_DATA_CACHE_ENABLE() SET_BIT(FLASH->ACR, FLASH_ACR_DCEN) 634 #define __HAL_FLASH_INSTRUCTION_CACHE_RESET() do { SET_BIT(FLASH->ACR, FLASH_ACR_ICRST); \ 643 #define __HAL_FLASH_DATA_CACHE_RESET() do { SET_BIT(FLASH->ACR, FLASH_ACR_DCRST); \ 654 SET_BIT(FLASH->ACR, FLASH_ACR_RUN_PD); \ 671 #define __HAL_FLASH_SLEEP_POWERDOWN_ENABLE() SET_BIT(FLASH->ACR, FLASH_ACR_SLEEP_PD) 698 #define __HAL_FLASH_ENABLE_IT(__INTERRUPT__) do { if((__INTERRUPT__) & FLASH_IT_ECCC) { SET_BIT(… 699 …if((__INTERRUPT__) & (~FLASH_IT_ECCC)) { SET_BIT(FLASH->CR, ((__INTERRUPT__) & (~FLASH_IT_ECCC)));… 761 …AG__) do { if((__FLAG__) & (FLASH_FLAG_ECCC | FLASH_FLAG_ECCD)) { SET_BIT(FLASH->ECCR, ((__…
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/external/ms-tpm-20-ref/Samples/Nucleo-TPM/L4A6RG/Drivers/STM32L4xx_HAL_Driver/Src/ |
D | stm32l4xx_hal_pwr_ex.c | 222 SET_BIT(PWR->CR5, PWR_CR5_R1MODE); in HAL_PWREx_ControlVoltageScaling() 242 SET_BIT(PWR->CR5, PWR_CR5_R1MODE); in HAL_PWREx_ControlVoltageScaling() 307 SET_BIT(PWR->CR4, PWR_CR4_VBE); in HAL_PWREx_EnableBatteryCharging() 329 SET_BIT(PWR->CR2, PWR_CR2_USV); in HAL_PWREx_EnableVddUSB() 351 SET_BIT(PWR->CR2, PWR_CR2_IOSV); in HAL_PWREx_EnableVddIO2() 372 SET_BIT(PWR->CR3, PWR_CR3_EIWF); in HAL_PWREx_EnableInternalWakeUpLine() 416 SET_BIT(PWR->PUCRA, (GPIONumber & (~(PWR_GPIO_BIT_14)))); in HAL_PWREx_EnableGPIOPullUp() 420 SET_BIT(PWR->PUCRB, GPIONumber); in HAL_PWREx_EnableGPIOPullUp() 424 SET_BIT(PWR->PUCRC, GPIONumber); in HAL_PWREx_EnableGPIOPullUp() 429 SET_BIT(PWR->PUCRD, GPIONumber); in HAL_PWREx_EnableGPIOPullUp() [all …]
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D | stm32l4xx_hal_pwr.c | 123 SET_BIT(PWR->CR1, PWR_CR1_DBP); in HAL_PWR_EnableBkUpAccess() 376 SET_BIT(PWR->CR2, PWR_CR2_PVDE); in HAL_PWR_EnablePVD() 417 SET_BIT(PWR->CR3, (PWR_CR3_EWUP & WakeUpPinPolarity)); in HAL_PWR_EnableWakeUpPin() 576 SET_BIT(SCB->SCR, ((uint32_t)SCB_SCR_SLEEPDEEP_Msk)); in HAL_PWR_EnterSTANDBYMode() 599 SET_BIT(SCB->SCR, ((uint32_t)SCB_SCR_SLEEPONEXIT_Msk)); in HAL_PWR_EnableSleepOnExit() 626 SET_BIT(SCB->SCR, ((uint32_t)SCB_SCR_SEVONPEND_Msk)); in HAL_PWR_EnableSEVOnPend()
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D | stm32l4xx_hal.c | 457 SET_BIT(DBGMCU->CR, DBGMCU_CR_DBG_SLEEP); in HAL_DBGMCU_EnableDBGSleepMode() 475 SET_BIT(DBGMCU->CR, DBGMCU_CR_DBG_STOP); in HAL_DBGMCU_EnableDBGStopMode() 493 SET_BIT(DBGMCU->CR, DBGMCU_CR_DBG_STANDBY); in HAL_DBGMCU_EnableDBGStandbyMode() 628 SET_BIT(VREFBUF->CSR, VREFBUF_CSR_ENVR); in HAL_SYSCFG_EnableVREFBUF() 663 SET_BIT(SYSCFG->CFGR1, SYSCFG_CFGR1_BOOSTEN); in HAL_SYSCFG_EnableIOAnalogSwitchBooster()
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D | stm32l4xx_hal_uart.c | 360 SET_BIT(huart->Instance->CR3, USART_CR3_HDSEL); in HAL_HalfDuplex_Init() 436 SET_BIT(huart->Instance->CR2, USART_CR2_LINEN); in HAL_LIN_Init() 872 SET_BIT(huart->Instance->CR3, USART_CR3_TXFTIE); in HAL_UART_Transmit_IT() 892 SET_BIT(huart->Instance->CR1, USART_CR1_TXEIE_TXFNFIE); in HAL_UART_Transmit_IT() 894 SET_BIT(huart->Instance->CR1, USART_CR1_TXEIE); in HAL_UART_Transmit_IT() 938 SET_BIT(huart->Instance->CR3, USART_CR3_EIE); in HAL_UART_Receive_IT() 958 SET_BIT(huart->Instance->CR1, USART_CR1_PEIE); in HAL_UART_Receive_IT() 959 SET_BIT(huart->Instance->CR3, USART_CR3_RXFTIE); in HAL_UART_Receive_IT() 979 SET_BIT(huart->Instance->CR1, USART_CR1_PEIE | USART_CR1_RXNEIE_RXFNEIE); in HAL_UART_Receive_IT() 981 SET_BIT(huart->Instance->CR1, USART_CR1_PEIE | USART_CR1_RXNEIE); in HAL_UART_Receive_IT() [all …]
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D | stm32l4xx_hal_flash_ex.c | 548 SET_BIT(FLASH->CR, FLASH_CR_MER1); in FLASH_MassErase() 557 SET_BIT(FLASH->CR, FLASH_CR_MER2); in FLASH_MassErase() 564 SET_BIT(FLASH->CR, (FLASH_CR_MER1 | FLASH_CR_MER2)); in FLASH_MassErase() 569 SET_BIT(FLASH->CR, FLASH_CR_STRT); in FLASH_MassErase() 606 SET_BIT(FLASH->CR, FLASH_CR_BKER); in FLASH_PageErase() 613 SET_BIT(FLASH->CR, FLASH_CR_PER); in FLASH_PageErase() 614 SET_BIT(FLASH->CR, FLASH_CR_STRT); in FLASH_PageErase() 715 SET_BIT(FLASH->CR, FLASH_CR_OPTSTRT); in FLASH_OB_WRPConfig() 761 SET_BIT(FLASH->CR, FLASH_CR_OPTSTRT); in FLASH_OB_RDPConfig() 975 SET_BIT(FLASH->CR, FLASH_CR_OPTSTRT); in FLASH_OB_UserConfig() [all …]
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D | stm32l4xx_hal_flash.c | 532 SET_BIT(FLASH->CR, FLASH_CR_LOCK); in HAL_FLASH_Lock() 564 SET_BIT(FLASH->CR, FLASH_CR_OPTLOCK); in HAL_FLASH_OB_Lock() 576 SET_BIT(FLASH->CR, FLASH_CR_OBL_LAUNCH); in HAL_FLASH_OB_Launch() 783 SET_BIT(FLASH->CR, FLASH_CR_PG); in FLASH_Program_DoubleWord() 806 SET_BIT(FLASH->CR, FLASH_CR_FSTPG); in FLASH_Program_Fast()
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/external/ms-tpm-20-ref/Samples/Nucleo-TPM/L476RG/Drivers/STM32L4xx_HAL_Driver/Src/ |
D | stm32l4xx_hal_pwr_ex.c | 222 SET_BIT(PWR->CR5, PWR_CR5_R1MODE); in HAL_PWREx_ControlVoltageScaling() 242 SET_BIT(PWR->CR5, PWR_CR5_R1MODE); in HAL_PWREx_ControlVoltageScaling() 307 SET_BIT(PWR->CR4, PWR_CR4_VBE); in HAL_PWREx_EnableBatteryCharging() 329 SET_BIT(PWR->CR2, PWR_CR2_USV); in HAL_PWREx_EnableVddUSB() 351 SET_BIT(PWR->CR2, PWR_CR2_IOSV); in HAL_PWREx_EnableVddIO2() 372 SET_BIT(PWR->CR3, PWR_CR3_EIWF); in HAL_PWREx_EnableInternalWakeUpLine() 416 SET_BIT(PWR->PUCRA, (GPIONumber & (~(PWR_GPIO_BIT_14)))); in HAL_PWREx_EnableGPIOPullUp() 420 SET_BIT(PWR->PUCRB, GPIONumber); in HAL_PWREx_EnableGPIOPullUp() 424 SET_BIT(PWR->PUCRC, GPIONumber); in HAL_PWREx_EnableGPIOPullUp() 429 SET_BIT(PWR->PUCRD, GPIONumber); in HAL_PWREx_EnableGPIOPullUp() [all …]
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D | stm32l4xx_hal_pwr.c | 123 SET_BIT(PWR->CR1, PWR_CR1_DBP); in HAL_PWR_EnableBkUpAccess() 376 SET_BIT(PWR->CR2, PWR_CR2_PVDE); in HAL_PWR_EnablePVD() 417 SET_BIT(PWR->CR3, (PWR_CR3_EWUP & WakeUpPinPolarity)); in HAL_PWR_EnableWakeUpPin() 576 SET_BIT(SCB->SCR, ((uint32_t)SCB_SCR_SLEEPDEEP_Msk)); in HAL_PWR_EnterSTANDBYMode() 599 SET_BIT(SCB->SCR, ((uint32_t)SCB_SCR_SLEEPONEXIT_Msk)); in HAL_PWR_EnableSleepOnExit() 626 SET_BIT(SCB->SCR, ((uint32_t)SCB_SCR_SEVONPEND_Msk)); in HAL_PWR_EnableSEVOnPend()
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D | stm32l4xx_hal.c | 457 SET_BIT(DBGMCU->CR, DBGMCU_CR_DBG_SLEEP); in HAL_DBGMCU_EnableDBGSleepMode() 475 SET_BIT(DBGMCU->CR, DBGMCU_CR_DBG_STOP); in HAL_DBGMCU_EnableDBGStopMode() 493 SET_BIT(DBGMCU->CR, DBGMCU_CR_DBG_STANDBY); in HAL_DBGMCU_EnableDBGStandbyMode() 628 SET_BIT(VREFBUF->CSR, VREFBUF_CSR_ENVR); in HAL_SYSCFG_EnableVREFBUF() 663 SET_BIT(SYSCFG->CFGR1, SYSCFG_CFGR1_BOOSTEN); in HAL_SYSCFG_EnableIOAnalogSwitchBooster()
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D | stm32l4xx_hal_uart.c | 360 SET_BIT(huart->Instance->CR3, USART_CR3_HDSEL); in HAL_HalfDuplex_Init() 436 SET_BIT(huart->Instance->CR2, USART_CR2_LINEN); in HAL_LIN_Init() 872 SET_BIT(huart->Instance->CR3, USART_CR3_TXFTIE); in HAL_UART_Transmit_IT() 892 SET_BIT(huart->Instance->CR1, USART_CR1_TXEIE_TXFNFIE); in HAL_UART_Transmit_IT() 894 SET_BIT(huart->Instance->CR1, USART_CR1_TXEIE); in HAL_UART_Transmit_IT() 938 SET_BIT(huart->Instance->CR3, USART_CR3_EIE); in HAL_UART_Receive_IT() 958 SET_BIT(huart->Instance->CR1, USART_CR1_PEIE); in HAL_UART_Receive_IT() 959 SET_BIT(huart->Instance->CR3, USART_CR3_RXFTIE); in HAL_UART_Receive_IT() 979 SET_BIT(huart->Instance->CR1, USART_CR1_PEIE | USART_CR1_RXNEIE_RXFNEIE); in HAL_UART_Receive_IT() 981 SET_BIT(huart->Instance->CR1, USART_CR1_PEIE | USART_CR1_RXNEIE); in HAL_UART_Receive_IT() [all …]
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D | stm32l4xx_hal_flash_ex.c | 548 SET_BIT(FLASH->CR, FLASH_CR_MER1); in FLASH_MassErase() 557 SET_BIT(FLASH->CR, FLASH_CR_MER2); in FLASH_MassErase() 564 SET_BIT(FLASH->CR, (FLASH_CR_MER1 | FLASH_CR_MER2)); in FLASH_MassErase() 569 SET_BIT(FLASH->CR, FLASH_CR_STRT); in FLASH_MassErase() 606 SET_BIT(FLASH->CR, FLASH_CR_BKER); in FLASH_PageErase() 613 SET_BIT(FLASH->CR, FLASH_CR_PER); in FLASH_PageErase() 614 SET_BIT(FLASH->CR, FLASH_CR_STRT); in FLASH_PageErase() 715 SET_BIT(FLASH->CR, FLASH_CR_OPTSTRT); in FLASH_OB_WRPConfig() 761 SET_BIT(FLASH->CR, FLASH_CR_OPTSTRT); in FLASH_OB_RDPConfig() 975 SET_BIT(FLASH->CR, FLASH_CR_OPTSTRT); in FLASH_OB_UserConfig() [all …]
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D | stm32l4xx_hal_flash.c | 532 SET_BIT(FLASH->CR, FLASH_CR_LOCK); in HAL_FLASH_Lock() 564 SET_BIT(FLASH->CR, FLASH_CR_OPTLOCK); in HAL_FLASH_OB_Lock() 576 SET_BIT(FLASH->CR, FLASH_CR_OBL_LAUNCH); in HAL_FLASH_OB_Launch() 783 SET_BIT(FLASH->CR, FLASH_CR_PG); in FLASH_Program_DoubleWord() 806 SET_BIT(FLASH->CR, FLASH_CR_FSTPG); in FLASH_Program_Fast()
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/external/pcre/dist2/src/ |
D | pcre2_study.c | 57 #define SET_BIT(c) re->start_bitmap[(c)/8] |= (1u << ((c)&7)) macro 793 if (c > 0xff) SET_BIT(0xff); else in set_table_bit() 796 SET_BIT(c); in set_table_bit() 825 SET_BIT(buff[0]); in set_table_bit() 827 else if (c < 256) SET_BIT(c); in set_table_bit() 829 if (c > 0xff) SET_BIT(0xff); else SET_BIT(c); in set_table_bit() 838 if (MAX_255(c)) SET_BIT(re->tables[fcc_offset + c]); in set_table_bit() 879 SET_BIT(buff[0]); in set_type_bits() 1094 if (c > 0xff) SET_BIT(0xff); else SET_BIT(c); in set_start_bits() 1259 SET_BIT(CHAR_HT); in set_start_bits() [all …]
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/external/mesa3d/src/glx/ |
D | glxextensions.c | 39 #define SET_BIT(m,b) (m[ (b) / 8 ] |= (1U << ((b) % 8))) macro 396 SET_BIT(supported, ext->bit); in set_glx_extension() 497 SET_BIT(force_enable, ext->bit); in __ParseExtensionOverride() 499 SET_BIT(force_disable, ext->bit); in __ParseExtensionOverride() 574 SET_BIT(client_glx_support, bit); in __glXExtensionsCtr() 578 SET_BIT(direct_glx_support, bit); in __glXExtensionsCtr() 582 SET_BIT(client_glx_only, bit); in __glXExtensionsCtr() 586 SET_BIT(direct_glx_only, bit); in __glXExtensionsCtr() 594 SET_BIT(client_gl_support, bit); in __glXExtensionsCtr() 598 SET_BIT(client_gl_only, bit); in __glXExtensionsCtr() [all …]
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/external/ms-tpm-20-ref/TPMCmd/tpm/src/subsystem/ |
D | PP.c | 69 SET_BIT(commandIndex, gp.ppList); in PhysicalPresencePreInstall_Init() 92 SET_BIT(commandIndex, gp.ppList); in PhysicalPresenceCommandSet()
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