Searched refs:SGPR32 (Results 1 – 13 of 13) sorted by relevance
| /external/llvm/lib/Target/AMDGPU/ |
| D | AMDGPUCallingConv.td | 25 SGPR32, SGPR33, SGPR34, SGPR35, SGPR36, SGPR37, SGPR38, SGPR39
31 SGPR32, SGPR34, SGPR36, SGPR38 ],
61 SGPR32, SGPR34, SGPR36, SGPR38 ],
75 SGPR32, SGPR33, SGPR34, SGPR35, SGPR36, SGPR37, SGPR38, SGPR39
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AMDGPU/ |
| D | GCNRegPressure.h | 30 SGPR32, enumerator
47 unsigned getSGPRNum() const { return Value[SGPR32]; } in getSGPRNum()
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| D | GCNRegPressure.cpp | 91 (STI->getRegSizeInBits(*RC) == 32 ? SGPR32 : SGPR_TUPLE) : in getRegKind()
113 case SGPR32: in inc()
126 Value[Kind == SGPR_TUPLE ? SGPR32 : Kind == AGPR_TUPLE ? AGPR32 : VGPR32] += in inc()
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| D | AMDGPUCallingConv.td | 26 SGPR32, SGPR33, SGPR34, SGPR35, SGPR36, SGPR37, SGPR38, SGPR39,
58 SGPR32, SGPR33, SGPR34, SGPR35, SGPR36, SGPR37, SGPR38, SGPR39,
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| D | SIMachineFunctionInfo.cpp | 75 StackPtrOffsetReg = AMDGPU::SGPR32; in SIMachineFunctionInfo()
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| D | SIISelLowering.cpp | 1928 if (!MRI.isLiveIn(AMDGPU::SGPR32)) { in reservePrivateMemoryRegs()
1929 Info.setStackPtrOffsetReg(AMDGPU::SGPR32); in reservePrivateMemoryRegs()
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| /external/llvm-project/llvm/lib/Target/AMDGPU/ |
| D | GCNRegPressure.h | 38 SGPR32, enumerator
55 unsigned getSGPRNum() const { return Value[SGPR32]; } in getSGPRNum()
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| D | GCNRegPressure.cpp | 96 (STI->getRegSizeInBits(*RC) == 32 ? SGPR32 : SGPR_TUPLE) : in getRegKind()
117 case SGPR32: in inc()
128 Value[Kind == SGPR_TUPLE ? SGPR32 : Kind == AGPR_TUPLE ? AGPR32 : VGPR32] += in inc()
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| D | AMDGPUCallingConv.td | 94 SGPR32, SGPR33, SGPR34, SGPR35, SGPR36, SGPR37, SGPR38, SGPR39,
126 SGPR32, SGPR33, SGPR34, SGPR35, SGPR36, SGPR37, SGPR38, SGPR39,
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| D | SIMachineFunctionInfo.cpp | 80 StackPtrOffsetReg = AMDGPU::SGPR32; in SIMachineFunctionInfo()
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| D | SIISelLowering.cpp | 882 setStackPointerRegisterToSaveRestore(AMDGPU::SGPR32); in SITargetLowering()
2158 if (!MRI.isLiveIn(AMDGPU::SGPR32)) { in reservePrivateMemoryRegs()
2159 Info.setStackPtrOffsetReg(AMDGPU::SGPR32); in reservePrivateMemoryRegs()
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| /external/llvm/test/CodeGen/AMDGPU/ |
| D | spill-alloc-sgpr-init-bug.ll | 20 …call void asm sideeffect "", "~{SGPR32},~{SGPR36},~{SGPR40},~{SGPR44},~{SGPR48},~{SGPR52},~{SGPR56…
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| /external/llvm-project/llvm/docs/ |
| D | AMDGPUUsage.rst | 4441 SGPR32 to the unswizzled scratch offset of the address past the last local
8128 8. SGPR32 is used for the stack pointer (SP). It is an unswizzled scratch
8162 arguments after the last local allocation and adjust SGPR32 to the address
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