/external/curl/tests/data/ |
D | test1561 | 21 Set-Cookie: __Secure-SID=12345; Domain=example.com 22 Set-Cookie: __Secure-SID=12346; Secure; Domain=example.com 23 Set-Cookie: supersupersuper=secret; __Secure-SID=12346; Secure; Domain=example.com 24 Set-Cookie: __Host-SID=22345 25 Set-Cookie: __Host-SID=22346; Secure 26 Set-Cookie: __Host-SID=22347; Domain=example.com 27 Set-Cookie: __Host-SID=22348; Domain=example.com; Path=/ 28 Set-Cookie: __Host-SID=22349; Secure; Domain=example.com; Path=/ 29 Set-Cookie: __Host-SID=12346; Secure; Path=/ 45 Set-Cookie: __Secure-SID=22345; Domain=example.com [all …]
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/external/tcpdump/tests/ |
D | forces1.out | 1 … > 211.129.72.8.6704: sctp[ForCES HP] (1) [DATA] (B)(E) [TSN: 1048037094] [SID: 0] [SSEQ 1] [PPID … 4 … 150.140.254.202.48316: sctp[ForCES LP] (1) [DATA] (B)(E) [TSN: 18398476] [SID: 0] [SSEQ 0] [PPID … 8 …150.140.254.202.57077: sctp[ForCES HP] (1) [DATA] (B)(E) [TSN: 167996938] [SID: 0] [SSEQ 2] [PPID … 11 …150.140.254.202.57077: sctp[ForCES HP] (1) [DATA] (B)(E) [TSN: 167996939] [SID: 0] [SSEQ 3] [PPID … 15 …150.140.254.202.57077: sctp[ForCES HP] (1) [DATA] (B)(E) [TSN: 167996940] [SID: 0] [SSEQ 4] [PPID … 18 …150.140.254.202.57077: sctp[ForCES HP] (1) [DATA] (B)(E) [TSN: 167996941] [SID: 0] [SSEQ 5] [PPID … 22 …150.140.254.202.57077: sctp[ForCES HP] (1) [DATA] (B)(E) [TSN: 167996942] [SID: 0] [SSEQ 6] [PPID … 29 … > 211.129.72.8.6706: sctp[ForCES LP] (1) [DATA] (B)(E) [TSN: 1830592460] [SID: 0] [SSEQ 30] [PPID… 33 … 150.140.254.202.48316: sctp[ForCES LP] (1) [DATA] (B)(E) [TSN: 18398553] [SID: 0] [SSEQ 77] [PPID… 36 … 150.140.254.202.48316: sctp[ForCES LP] (1) [DATA] (B)(E) [TSN: 18398573] [SID: 0] [SSEQ 97] [PPID…
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D | isup.out | 1 IP 10.28.6.42.2905 > 10.28.6.44.2905: sctp (1) [DATA] (B)(E) [TSN: 1822994892] [SID: 6] [SSEQ 42] [… 2 IP 10.28.6.44.2905 > 10.28.6.42.2905: sctp (1) [DATA] (B)(E) [TSN: 4307] [SID: 0] [SSEQ 643] [PPID … 3 IP 10.28.6.44.2905 > 10.28.6.42.2905: sctp (1) [DATA] (B)(E) [TSN: 4308] [SID: 0] [SSEQ 644] [PPID … 4 IP 10.28.6.44.2905 > 10.28.6.42.2905: sctp (1) [DATA] (B)(E) [TSN: 4309] [SID: 0] [SSEQ 645] [PPID … 5 IP 10.28.6.42.2905 > 10.28.6.44.2905: sctp (1) [DATA] (B)(E) [TSN: 1822994893] [SID: 6] [SSEQ 43] [… 6 IP 10.28.6.44.2905 > 10.28.6.42.2905: sctp (1) [DATA] (B)(E) [TSN: 4310] [SID: 0] [SSEQ 646] [PPID …
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D | isupvv.out | 3 1) [DATA] (B)(E) [TSN: 1822994892] [SID: 6] [SSEQ 42] [PPID M3UA] 8 1) [DATA] (B)(E) [TSN: 4307] [SID: 0] [SSEQ 643] [PPID M3UA] 13 1) [DATA] (B)(E) [TSN: 4308] [SID: 0] [SSEQ 644] [PPID M3UA] 18 1) [DATA] (B)(E) [TSN: 4309] [SID: 0] [SSEQ 645] [PPID M3UA] 23 1) [DATA] (B)(E) [TSN: 1822994893] [SID: 6] [SSEQ 43] [PPID M3UA] 28 1) [DATA] (B)(E) [TSN: 4310] [SID: 0] [SSEQ 646] [PPID M3UA]
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D | forces1vvv.out | 3 1) [DATA] (B)(E) [TSN: 1048037094] [SID: 0] [SSEQ 1] [PPID 0x0] 42 1) [DATA] (B)(E) [TSN: 18398476] [SID: 0] [SSEQ 0] [PPID 0x0] 57 1) [DATA] (B)(E) [TSN: 167996938] [SID: 0] [SSEQ 2] [PPID 0x0] 75 1) [DATA] (B)(E) [TSN: 167996939] [SID: 0] [SSEQ 3] [PPID 0x0] 101 1) [DATA] (B)(E) [TSN: 167996940] [SID: 0] [SSEQ 4] [PPID 0x0] 124 1) [DATA] (B)(E) [TSN: 167996941] [SID: 0] [SSEQ 5] [PPID 0x0] 150 1) [DATA] (B)(E) [TSN: 167996942] [SID: 0] [SSEQ 6] [PPID 0x0] 185 1) [DATA] (B)(E) [TSN: 1830592460] [SID: 0] [SSEQ 30] [PPID 0x0] 200 1) [DATA] (B)(E) [TSN: 18398553] [SID: 0] [SSEQ 77] [PPID 0x0] 212 1) [DATA] (B)(E) [TSN: 18398573] [SID: 0] [SSEQ 97] [PPID 0x0]
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D | forces1vvvv.out | 3 1) [DATA] (B)(E) [TSN: 1048037094] [SID: 0] [SSEQ 1] [PPID 0x0] 66 1) [DATA] (B)(E) [TSN: 18398476] [SID: 0] [SSEQ 0] [PPID 0x0] 86 1) [DATA] (B)(E) [TSN: 167996938] [SID: 0] [SSEQ 2] [PPID 0x0] 111 1) [DATA] (B)(E) [TSN: 167996939] [SID: 0] [SSEQ 3] [PPID 0x0] 144 1) [DATA] (B)(E) [TSN: 167996940] [SID: 0] [SSEQ 4] [PPID 0x0] 174 1) [DATA] (B)(E) [TSN: 167996941] [SID: 0] [SSEQ 5] [PPID 0x0] 207 1) [DATA] (B)(E) [TSN: 167996942] [SID: 0] [SSEQ 6] [PPID 0x0] 249 1) [DATA] (B)(E) [TSN: 1830592460] [SID: 0] [SSEQ 30] [PPID 0x0] 269 1) [DATA] (B)(E) [TSN: 18398553] [SID: 0] [SSEQ 77] [PPID 0x0] 286 1) [DATA] (B)(E) [TSN: 18398573] [SID: 0] [SSEQ 97] [PPID 0x0]
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D | forces2vv.out | 39 1) [DATA] (B)(E) [TSN: 3848071494] [SID: 0] [SSEQ 0] [PPID 0x0] 54 1) [DATA] (B)(E) [TSN: 918167005] [SID: 0] [SSEQ 0] [PPID 0x0] 69 1) [DATA] (B)(E) [TSN: 1469124988] [SID: 0] [SSEQ 0] [PPID 0x0] 84 1) [DATA] (B)(E) [TSN: 4164546507] [SID: 0] [SSEQ 0] [PPID 0x0] 99 1) [DATA] (B)(E) [TSN: 1469124989] [SID: 0] [SSEQ 1] [PPID 0x0] 114 1) [DATA] (B)(E) [TSN: 4164546508] [SID: 0] [SSEQ 1] [PPID 0x0] 153 1) [DATA] (B)(E) [TSN: 1469124990] [SID: 0] [SSEQ 2] [PPID 0x0] 168 1) [DATA] (B)(E) [TSN: 4164546509] [SID: 0] [SSEQ 2] [PPID 0x0] 183 1) [DATA] (B)(E) [TSN: 918167006] [SID: 0] [SSEQ 1] [PPID 0x0] 198 1) [DATA] (B)(E) [TSN: 3848071495] [SID: 0] [SSEQ 1] [PPID 0x0] [all …]
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D | forces2vvv.out | 39 1) [DATA] (B)(E) [TSN: 1498547998] [SID: 0] [SSEQ 0] [PPID 0x0] 54 1) [DATA] (B)(E) [TSN: 2413889661] [SID: 0] [SSEQ 0] [PPID 0x0] 69 1) [DATA] (B)(E) [TSN: 2244318871] [SID: 0] [SSEQ 0] [PPID 0x0] 84 1) [DATA] (B)(E) [TSN: 922703190] [SID: 0] [SSEQ 0] [PPID 0x0] 123 1) [DATA] (B)(E) [TSN: 2244318872] [SID: 0] [SSEQ 1] [PPID 0x0] 138 1) [DATA] (B)(E) [TSN: 922703191] [SID: 0] [SSEQ 1] [PPID 0x0] 153 1) [DATA] (B)(E) [TSN: 2244318873] [SID: 0] [SSEQ 2] [PPID 0x0] 174 1) [DATA] (B)(E) [TSN: 922703192] [SID: 0] [SSEQ 2] [PPID 0x0] 207 1) [DATA] (B)(E) [TSN: 2244318874] [SID: 0] [SSEQ 3] [PPID 0x0] 220 2) [DATA] (B)(E) [TSN: 922703193] [SID: 0] [SSEQ 3] [PPID 0x0] [all …]
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/external/llvm/test/CodeGen/AMDGPU/ |
D | llvm.r600.tex.ll | 3 ;CHECK: TEX_SAMPLE T{{[0-9]+\.XYZW, T[0-9]+\.XYZW}} RID:0 SID:0 CT:NNNN 4 ;CHECK: TEX_SAMPLE T{{[0-9]+\.XYZW, T[0-9]+\.XYZW}} RID:0 SID:0 CT:NNNN 5 ;CHECK: TEX_SAMPLE T{{[0-9]+\.XYZW, T[0-9]+\.XYZW}} RID:0 SID:0 CT:NNNN 6 ;CHECK: TEX_SAMPLE T{{[0-9]+\.XYZW, T[0-9]+\.XYZW}} RID:0 SID:0 CT:NNNN 7 ;CHECK: TEX_SAMPLE T{{[0-9]+\.XYZW, T[0-9]+\.XYZW}} RID:0 SID:0 CT:UUNN 8 ;CHECK: TEX_SAMPLE_C T{{[0-9]+\.XYZW, T[0-9]+\.XYZZ}} RID:0 SID:0 CT:NNNN 9 ;CHECK: TEX_SAMPLE_C T{{[0-9]+\.XYZW, T[0-9]+\.XYZZ}} RID:0 SID:0 CT:NNNN 10 ;CHECK: TEX_SAMPLE_C T{{[0-9]+\.XYZW, T[0-9]+\.XYZZ}} RID:0 SID:0 CT:UUNN 11 ;CHECK: TEX_SAMPLE T{{[0-9]+\.XYZW, T[0-9]+\.XYYW}} RID:0 SID:0 CT:NNUN 12 ;CHECK: TEX_SAMPLE T{{[0-9]+\.XYZW, T[0-9]+\.XYZW}} RID:0 SID:0 CT:NNUN [all …]
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/external/llvm-project/llvm/test/CodeGen/AMDGPU/ |
D | llvm.r600.tex.ll | 3 ;CHECK: TEX_SAMPLE T{{[0-9]+\.XYZW, T[0-9]+\.XYZW}} RID:0 SID:0 CT:NNNN 4 ;CHECK: TEX_SAMPLE T{{[0-9]+\.XYZW, T[0-9]+\.XYZW}} RID:0 SID:0 CT:NNNN 5 ;CHECK: TEX_SAMPLE T{{[0-9]+\.XYZW, T[0-9]+\.XYZW}} RID:0 SID:0 CT:NNNN 6 ;CHECK: TEX_SAMPLE T{{[0-9]+\.XYZW, T[0-9]+\.XYZW}} RID:0 SID:0 CT:NNNN 7 ;CHECK: TEX_SAMPLE T{{[0-9]+\.XYZW, T[0-9]+\.XYZW}} RID:0 SID:0 CT:UUNN 8 ;CHECK: TEX_SAMPLE_C T{{[0-9]+\.XYZW, T[0-9]+\.XYZZ}} RID:0 SID:0 CT:NNNN 9 ;CHECK: TEX_SAMPLE_C T{{[0-9]+\.XYZW, T[0-9]+\.XYZZ}} RID:0 SID:0 CT:NNNN 10 ;CHECK: TEX_SAMPLE_C T{{[0-9]+\.XYZW, T[0-9]+\.XYZZ}} RID:0 SID:0 CT:UUNN 11 ;CHECK: TEX_SAMPLE T{{[0-9]+\.XYZW, T[0-9]+\.XYYW}} RID:0 SID:0 CT:NNUN 12 ;CHECK: TEX_SAMPLE T{{[0-9]+\.XYZW, T[0-9]+\.XYZW}} RID:0 SID:0 CT:NNUN [all …]
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/external/virglrenderer/src/gallium/auxiliary/tgsi/ |
D | tgsi_dump.c | 91 #define SID(I) ctx->dump_printf( ctx, "%d", I ) macro 117 SID( src->DimIndirect.Index ); in _dump_register_src() 123 SID( src->Dimension.Index ); in _dump_register_src() 128 SID( src->DimIndirect.ArrayID ); in _dump_register_src() 133 SID(src->Dimension.Index); in _dump_register_src() 141 SID( src->Indirect.Index ); in _dump_register_src() 147 SID( src->Register.Index ); in _dump_register_src() 152 SID( src->Indirect.ArrayID ); in _dump_register_src() 157 SID( src->Register.Index ); in _dump_register_src() 174 SID( dst->DimIndirect.Index ); in _dump_register_dst() [all …]
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/external/mesa3d/src/gallium/auxiliary/tgsi/ |
D | tgsi_dump.c | 95 #define SID(I) ctx->dump_printf( ctx, "%d", I ) macro 121 SID( src->DimIndirect.Index ); in _dump_register_src() 127 SID( src->Dimension.Index ); in _dump_register_src() 132 SID( src->DimIndirect.ArrayID ); in _dump_register_src() 137 SID(src->Dimension.Index); in _dump_register_src() 145 SID( src->Indirect.Index ); in _dump_register_src() 151 SID( src->Register.Index ); in _dump_register_src() 156 SID( src->Indirect.ArrayID ); in _dump_register_src() 161 SID( src->Register.Index ); in _dump_register_src() 178 SID( dst->DimIndirect.Index ); in _dump_register_dst() [all …]
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/external/llvm-project/llvm/lib/ExecutionEngine/RuntimeDyld/ |
D | RuntimeDyldMachO.h | 39 EHFrameRelatedSections(SID EH, SID T, SID Ex) in EHFrameRelatedSections() 41 SID EHFrameSID; 42 SID TextSID; 43 SID ExceptTabSID;
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D | RuntimeDyldELF.h | 30 uint64_t SymOffset = 0, SID SectionID = 0); 143 DenseMap<SID, SID> SectionToGOTMap; 156 SmallVector<SID, 2> UnregisteredEHFrameSections;
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/external/llvm/lib/ExecutionEngine/RuntimeDyld/ |
D | RuntimeDyldMachO.h | 40 EHFrameRelatedSections(SID EH, SID T, SID Ex) in EHFrameRelatedSections() 42 SID EHFrameSID; 43 SID TextSID; 44 SID ExceptTabSID;
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D | RuntimeDyldELF.h | 31 uint64_t SymOffset = 0, SID SectionID = 0); 60 uint64_t SymOffset, SID SectionID); 65 uint64_t SymOffset, SID SectionID); 143 DenseMap<SID, SID> SectionToGOTMap; 155 SmallVector<SID, 2> UnregisteredEHFrameSections; 156 SmallVector<SID, 2> RegisteredEHFrameSections;
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/external/swiftshader/third_party/llvm-10.0/llvm/lib/ExecutionEngine/RuntimeDyld/ |
D | RuntimeDyldMachO.h | 39 EHFrameRelatedSections(SID EH, SID T, SID Ex) in EHFrameRelatedSections() 41 SID EHFrameSID; 42 SID TextSID; 43 SID ExceptTabSID;
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D | RuntimeDyldELF.h | 30 uint64_t SymOffset = 0, SID SectionID = 0); 142 DenseMap<SID, SID> SectionToGOTMap; 155 SmallVector<SID, 2> UnregisteredEHFrameSections;
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/external/selinux/secilc/test/ |
D | minimum.cil | 3 (sid SID) 4 (sidorder (SID)) 18 (sidcontext SID (USER ROLE TYPE ((SENS)(SENS))))
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D | optional_test.cil | 4 (sid SID) 5 (sidorder (SID)) 19 (sidcontext SID (USER ROLE TYPE ((SENS)(SENS))))
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/external/llvm-project/llvm/lib/ExecutionEngine/RuntimeDyld/Targets/ |
D | RuntimeDyldELFMips.h | 35 uint64_t SymOffset, SID SectionID); 38 uint64_t SymOffset, SID SectionID); 57 uint64_t SymOffset, SID SectionID);
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/external/swiftshader/third_party/llvm-10.0/llvm/lib/ExecutionEngine/RuntimeDyld/Targets/ |
D | RuntimeDyldELFMips.h | 35 uint64_t SymOffset, SID SectionID); 38 uint64_t SymOffset, SID SectionID); 57 uint64_t SymOffset, SID SectionID);
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/external/llvm-project/clang-tools-extra/clangd/index/dex/dexp/ |
D | Dexp.cpp | 192 auto SID = SymbolID::fromStr(ID); in run() local 193 if (!SID) { in run() 194 llvm::errs() << llvm::toString(SID.takeError()) << "\n"; in run() 197 IDs.push_back(*SID); in run() 239 auto SID = SymbolID::fromStr(ID); in run() local 240 if (!SID) { in run() 241 llvm::errs() << llvm::toString(SID.takeError()) << "\n"; in run() 244 IDs.push_back(*SID); in run()
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/external/llvm-project/clang-tools-extra/clangd/ |
D | CollectMacros.cpp | 28 if (auto SID = getSymbolID(Name, MI, SM)) in add() local 29 Out.MacroRefs[SID].push_back(Range); in add()
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/external/ltp/testcases/kernel/containers/pidns/ |
D | pidns02.c | 60 #define SID 1 macro 75 if (pgid == PGID && sid == SID) { in child_fn1()
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