| /external/llvm-project/llvm/lib/Target/AMDGPU/ |
| D | SIMachineFunctionInfo.cpp | 30 SIMachineFunctionInfo::SIMachineFunctionInfo(const MachineFunction &MF) in SIMachineFunctionInfo() function in SIMachineFunctionInfo
197 void SIMachineFunctionInfo::limitOccupancy(const MachineFunction &MF) { in limitOccupancy()
204 Register SIMachineFunctionInfo::addPrivateSegmentBuffer( in addPrivateSegmentBuffer()
213 Register SIMachineFunctionInfo::addDispatchPtr(const SIRegisterInfo &TRI) { in addDispatchPtr()
220 Register SIMachineFunctionInfo::addQueuePtr(const SIRegisterInfo &TRI) { in addQueuePtr()
227 Register SIMachineFunctionInfo::addKernargSegmentPtr(const SIRegisterInfo &TRI) { in addKernargSegmentPtr()
235 Register SIMachineFunctionInfo::addDispatchID(const SIRegisterInfo &TRI) { in addDispatchID()
242 Register SIMachineFunctionInfo::addFlatScratchInit(const SIRegisterInfo &TRI) { in addFlatScratchInit()
249 Register SIMachineFunctionInfo::addImplicitBufferPtr(const SIRegisterInfo &TRI) { in addImplicitBufferPtr()
256 bool SIMachineFunctionInfo::isCalleeSavedReg(const MCPhysReg *CSRegs, in isCalleeSavedReg()
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| D | SIFrameLowering.cpp | 75 SIMachineFunctionInfo *MFI = MF.getInfo<SIMachineFunctionInfo>(); in getVGPRSpillLaneOrTempRegister()
303 const SIMachineFunctionInfo *MFI = MF->getInfo<SIMachineFunctionInfo>(); in buildGitPtr()
331 const SIMachineFunctionInfo *MFI = MF.getInfo<SIMachineFunctionInfo>(); in emitEntryFunctionFlatScratchInit()
481 SIMachineFunctionInfo *MFI = MF.getInfo<SIMachineFunctionInfo>(); in getEntryFunctionReservedScratchRsrcReg()
545 SIMachineFunctionInfo *MFI = MF.getInfo<SIMachineFunctionInfo>(); in emitEntryFunctionPrologue()
662 const SIMachineFunctionInfo *MFI = MF.getInfo<SIMachineFunctionInfo>(); in emitEntryFunctionScratchRsrcRegSetup()
807 SIMachineFunctionInfo *FuncInfo = MF.getInfo<SIMachineFunctionInfo>(); in buildScratchExecCopy()
842 SIMachineFunctionInfo *FuncInfo = MF.getInfo<SIMachineFunctionInfo>(); in emitPrologue()
922 for (const SIMachineFunctionInfo::SGPRSpillVGPRCSR &Reg in emitPrologue()
985 ArrayRef<SIMachineFunctionInfo::SpilledReg> Spill = in emitPrologue()
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| D | SIMachineFunctionInfo.h | 276 struct SIMachineFunctionInfo final : public yaml::MachineFunctionInfo {
296 SIMachineFunctionInfo() = default;
297 SIMachineFunctionInfo(const llvm::SIMachineFunctionInfo &,
301 ~SIMachineFunctionInfo() = default;
304 template <> struct MappingTraits<SIMachineFunctionInfo> {
305 static void mapping(IO &YamlIO, SIMachineFunctionInfo &MFI) {
334 class SIMachineFunctionInfo final : public AMDGPUMachineFunction {
503 SIMachineFunctionInfo(const MachineFunction &MF);
505 bool initializeBaseYamlFields(const yaml::SIMachineFunctionInfo &YamlMFI);
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| D | AMDGPUAsmPrinter.cpp | 204 const SIMachineFunctionInfo &MFI = *MF->getInfo<SIMachineFunctionInfo>(); in emitFunctionBodyStart()
223 const SIMachineFunctionInfo &MFI = *MF->getInfo<SIMachineFunctionInfo>(); in emitFunctionBodyEnd()
269 const SIMachineFunctionInfo *MFI = MF->getInfo<SIMachineFunctionInfo>(); in emitFunctionEntryLabel()
375 const SIMachineFunctionInfo &MFI = *MF.getInfo<SIMachineFunctionInfo>(); in getAmdhsaKernelCodeProperties()
638 const SIMachineFunctionInfo *MFI = MF.getInfo<SIMachineFunctionInfo>(); in analyzeResourceUsage()
1007 const SIMachineFunctionInfo *MFI = MF.getInfo<SIMachineFunctionInfo>(); in getSIProgramInfo()
1191 const SIMachineFunctionInfo *MFI = MF.getInfo<SIMachineFunctionInfo>(); in EmitProgramInfoSI()
1239 const SIMachineFunctionInfo *MFI = MF.getInfo<SIMachineFunctionInfo>(); in EmitPALMetadata()
1293 const SIMachineFunctionInfo *MFI = MF.getInfo<SIMachineFunctionInfo>(); in getAmdKernelCode()
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| D | SIRegisterInfo.cpp | 165 const SIMachineFunctionInfo *FuncInfo = MF.getInfo<SIMachineFunctionInfo>(); in getFrameRegister()
300 const SIMachineFunctionInfo *MFI = MF.getInfo<SIMachineFunctionInfo>(); in getReservedRegs()
350 const SIMachineFunctionInfo *Info = MF.getInfo<SIMachineFunctionInfo>(); in canRealignStack()
363 const SIMachineFunctionInfo *Info = Fn.getInfo<SIMachineFunctionInfo>(); in requiresRegisterScavenging()
517 MF->getInfo<SIMachineFunctionInfo>()->getStackPtrOffsetReg()) || in resolveFrameIndex()
683 SIMachineFunctionInfo *MFI = MF->getInfo<SIMachineFunctionInfo>(); in spillVGPRtoAGPR()
761 const SIMachineFunctionInfo *FuncInfo = MF->getInfo<SIMachineFunctionInfo>(); in buildSpillLoadStore()
951 SIMachineFunctionInfo *MFI = MF->getInfo<SIMachineFunctionInfo>(); in buildSGPRSpillLoadStore()
1062 SIMachineFunctionInfo *MFI = MF->getInfo<SIMachineFunctionInfo>(); in spillSGPR()
1065 ArrayRef<SIMachineFunctionInfo::SpilledReg> VGPRSpills in spillSGPR()
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| D | GCNIterativeScheduler.cpp | 485 SIMachineFunctionInfo *MFI = MF.getInfo<SIMachineFunctionInfo>(); in tryMaximizeOccupancy()
495 SIMachineFunctionInfo *MFI = MF.getInfo<SIMachineFunctionInfo>(); in scheduleLegacyMaxOccupancy()
549 const SIMachineFunctionInfo *MFI = MF.getInfo<SIMachineFunctionInfo>(); in scheduleMinReg()
583 SIMachineFunctionInfo *MFI = MF.getInfo<SIMachineFunctionInfo>(); in scheduleILP()
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| D | GCNSchedStrategy.h | 21 class SIMachineFunctionInfo; variable
77 SIMachineFunctionInfo &MFI;
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| D | SIISelLowering.h | 53 const SIMachineFunctionInfo &MFI,
330 const SIMachineFunctionInfo &Info,
454 SIMachineFunctionInfo &Info) const;
458 SIMachineFunctionInfo &Info,
465 SIMachineFunctionInfo &Info) const;
470 SIMachineFunctionInfo &Info) const;
475 SIMachineFunctionInfo &Info) const;
479 SIMachineFunctionInfo &Info) const;
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| D | AMDGPUCallLowering.cpp | 219 const SIMachineFunctionInfo *MFI = MF.getInfo<SIMachineFunctionInfo>(); in getStackAddress()
456 SIMachineFunctionInfo *MFI = MF.getInfo<SIMachineFunctionInfo>(); in lowerReturn()
503 const SIMachineFunctionInfo *MFI = MF.getInfo<SIMachineFunctionInfo>(); in lowerParameterPtr()
541 SIMachineFunctionInfo &Info) { in allocateHSAUserSGPRs()
594 SIMachineFunctionInfo *Info = MF.getInfo<SIMachineFunctionInfo>(); in lowerFormalArgumentsKernel()
794 SIMachineFunctionInfo *Info = MF.getInfo<SIMachineFunctionInfo>(); in lowerFormalArguments()
962 const SIMachineFunctionInfo *MFI = MF.getInfo<SIMachineFunctionInfo>(); in passSpecialInputs()
1229 const SIMachineFunctionInfo *MFI = MF.getInfo<SIMachineFunctionInfo>(); in lowerCall()
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| D | SILowerSGPRSpills.cpp | 237 SIMachineFunctionInfo *FuncInfo = MF.getInfo<SIMachineFunctionInfo>(); in lowerShiftReservedVGPR()
304 SIMachineFunctionInfo *FuncInfo = MF.getInfo<SIMachineFunctionInfo>(); in runOnMachineFunction()
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| D | AMDGPUSubtarget.cpp | 373 const auto *MFI = MF.getInfo<SIMachineFunctionInfo>(); in getOccupancyWithLocalMemSize()
653 const SIMachineFunctionInfo &MFI = *MF.getInfo<SIMachineFunctionInfo>(); in getReservedNumSGPRs()
684 const SIMachineFunctionInfo &MFI = *MF.getInfo<SIMachineFunctionInfo>(); in getMaxNumSGPRs()
734 const SIMachineFunctionInfo &MFI = *MF.getInfo<SIMachineFunctionInfo>(); in getMaxNumVGPRs()
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AMDGPU/ |
| D | SIMachineFunctionInfo.cpp | 29 SIMachineFunctionInfo::SIMachineFunctionInfo(const MachineFunction &MF) in SIMachineFunctionInfo() function in SIMachineFunctionInfo
180 void SIMachineFunctionInfo::limitOccupancy(const MachineFunction &MF) { in limitOccupancy()
187 unsigned SIMachineFunctionInfo::addPrivateSegmentBuffer( in addPrivateSegmentBuffer()
196 unsigned SIMachineFunctionInfo::addDispatchPtr(const SIRegisterInfo &TRI) { in addDispatchPtr()
203 unsigned SIMachineFunctionInfo::addQueuePtr(const SIRegisterInfo &TRI) { in addQueuePtr()
210 unsigned SIMachineFunctionInfo::addKernargSegmentPtr(const SIRegisterInfo &TRI) { in addKernargSegmentPtr()
218 unsigned SIMachineFunctionInfo::addDispatchID(const SIRegisterInfo &TRI) { in addDispatchID()
225 unsigned SIMachineFunctionInfo::addFlatScratchInit(const SIRegisterInfo &TRI) { in addFlatScratchInit()
232 unsigned SIMachineFunctionInfo::addImplicitBufferPtr(const SIRegisterInfo &TRI) { in addImplicitBufferPtr()
252 bool SIMachineFunctionInfo::haveFreeLanesForSGPRSpill(const MachineFunction &MF, in haveFreeLanesForSGPRSpill()
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| D | SIFrameLowering.h | 17 class SIMachineFunctionInfo; variable
66 SIMachineFunctionInfo *MFI,
71 SIMachineFunctionInfo *MFI, MachineFunction &MF) const;
75 MachineBasicBlock &MBB, SIMachineFunctionInfo *MFI,
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| D | SIFrameLowering.cpp | 192 const SIMachineFunctionInfo *MFI = MF.getInfo<SIMachineFunctionInfo>(); in emitFlatScratchInit()
273 SIMachineFunctionInfo *MFI, in getReservedPrivateSegmentBufferReg()
321 SIMachineFunctionInfo *MFI, MachineFunction &MF) const { in getReservedPrivateSegmentWaveByteOffsetReg()
396 SIMachineFunctionInfo *MFI = MF.getInfo<SIMachineFunctionInfo>(); in emitEntryFunctionPrologue()
534 MachineFunction &MF, MachineBasicBlock &MBB, SIMachineFunctionInfo *MFI, in emitEntryFunctionScratchSetup()
678 SIMachineFunctionInfo *FuncInfo = MF.getInfo<SIMachineFunctionInfo>(); in emitPrologue()
711 for (const SIMachineFunctionInfo::SGPRSpillVGPRCSR &Reg in emitPrologue()
756 ArrayRef<SIMachineFunctionInfo::SpilledReg> Spill in emitPrologue()
824 const SIMachineFunctionInfo *FuncInfo = MF.getInfo<SIMachineFunctionInfo>(); in emitEpilogue()
860 ArrayRef<SIMachineFunctionInfo::SpilledReg> Spill in emitEpilogue()
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| D | SIMachineFunctionInfo.h | 268 struct SIMachineFunctionInfo final : public yaml::MachineFunctionInfo {
286 SIMachineFunctionInfo() = default;
287 SIMachineFunctionInfo(const llvm::SIMachineFunctionInfo &,
291 ~SIMachineFunctionInfo() = default;
294 template <> struct MappingTraits<SIMachineFunctionInfo> {
295 static void mapping(IO &YamlIO, SIMachineFunctionInfo &MFI) {
323 class SIMachineFunctionInfo final : public AMDGPUMachineFunction {
487 SIMachineFunctionInfo(const MachineFunction &MF);
489 bool initializeBaseYamlFields(const yaml::SIMachineFunctionInfo &YamlMFI);
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| D | AMDGPUAsmPrinter.cpp | 192 const SIMachineFunctionInfo &MFI = *MF->getInfo<SIMachineFunctionInfo>(); in EmitFunctionBodyStart()
211 const SIMachineFunctionInfo &MFI = *MF->getInfo<SIMachineFunctionInfo>(); in EmitFunctionBodyEnd()
257 const SIMachineFunctionInfo *MFI = MF->getInfo<SIMachineFunctionInfo>(); in EmitFunctionEntryLabel()
365 const SIMachineFunctionInfo &MFI = *MF.getInfo<SIMachineFunctionInfo>(); in getAmdhsaKernelCodeProperties()
616 const SIMachineFunctionInfo *MFI = MF.getInfo<SIMachineFunctionInfo>(); in analyzeResourceUsage()
943 const SIMachineFunctionInfo *MFI = MF.getInfo<SIMachineFunctionInfo>(); in getSIProgramInfo()
1131 const SIMachineFunctionInfo *MFI = MF.getInfo<SIMachineFunctionInfo>(); in EmitProgramInfoSI()
1178 const SIMachineFunctionInfo *MFI = MF.getInfo<SIMachineFunctionInfo>(); in EmitPALMetadata()
1228 const SIMachineFunctionInfo *MFI = MF.getInfo<SIMachineFunctionInfo>(); in getAmdKernelCode()
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| D | SIRegisterInfo.cpp | 216 const SIMachineFunctionInfo *MFI = MF.getInfo<SIMachineFunctionInfo>(); in getReservedRegs()
264 const SIMachineFunctionInfo *Info = MF.getInfo<SIMachineFunctionInfo>(); in canRealignStack()
277 const SIMachineFunctionInfo *Info = Fn.getInfo<SIMachineFunctionInfo>(); in requiresRegisterScavenging()
402 MF->getInfo<SIMachineFunctionInfo>()->getStackPtrOffsetReg() && in resolveFrameIndex()
551 SIMachineFunctionInfo *MFI = MF->getInfo<SIMachineFunctionInfo>(); in spillVGPRtoAGPR()
751 SIMachineFunctionInfo *MFI = MF->getInfo<SIMachineFunctionInfo>(); in spillSGPR()
754 ArrayRef<SIMachineFunctionInfo::SpilledReg> VGPRSpills in spillSGPR()
791 SIMachineFunctionInfo::SpilledReg Spill = VGPRSpills[i]; in spillSGPR()
862 SIMachineFunctionInfo *MFI = MF->getInfo<SIMachineFunctionInfo>(); in restoreSGPR()
864 ArrayRef<SIMachineFunctionInfo::SpilledReg> VGPRSpills in restoreSGPR()
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| D | GCNIterativeScheduler.cpp | 480 SIMachineFunctionInfo *MFI = MF.getInfo<SIMachineFunctionInfo>(); in tryMaximizeOccupancy()
490 SIMachineFunctionInfo *MFI = MF.getInfo<SIMachineFunctionInfo>(); in scheduleLegacyMaxOccupancy()
544 const SIMachineFunctionInfo *MFI = MF.getInfo<SIMachineFunctionInfo>(); in scheduleMinReg()
578 SIMachineFunctionInfo *MFI = MF.getInfo<SIMachineFunctionInfo>(); in scheduleILP()
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| D | GCNSchedStrategy.h | 21 class SIMachineFunctionInfo; variable
69 SIMachineFunctionInfo &MFI;
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| D | AMDGPUCallLowering.cpp | 297 SIMachineFunctionInfo *MFI = MF.getInfo<SIMachineFunctionInfo>(); in lowerReturn()
345 const SIMachineFunctionInfo *MFI = MF.getInfo<SIMachineFunctionInfo>(); in lowerParameterPtr()
389 SIMachineFunctionInfo &Info) { in allocateHSAUserSGPRs()
442 SIMachineFunctionInfo *Info = MF.getInfo<SIMachineFunctionInfo>(); in lowerFormalArgumentsKernel()
582 SIMachineFunctionInfo *Info = MF.getInfo<SIMachineFunctionInfo>(); in lowerFormalArguments()
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| D | SIISelLowering.h | 52 const SIMachineFunctionInfo &MFI,
310 const SIMachineFunctionInfo &Info,
413 SIMachineFunctionInfo &Info) const;
417 SIMachineFunctionInfo &Info,
424 SIMachineFunctionInfo &Info) const;
429 SIMachineFunctionInfo &Info) const;
434 SIMachineFunctionInfo &Info) const;
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| /external/llvm/lib/Target/AMDGPU/ |
| D | SIMachineFunctionInfo.cpp | 30 void SIMachineFunctionInfo::anchor() {} in anchor()
32 SIMachineFunctionInfo::SIMachineFunctionInfo(const MachineFunction &MF) in SIMachineFunctionInfo() function in SIMachineFunctionInfo
148 unsigned SIMachineFunctionInfo::addPrivateSegmentBuffer( in addPrivateSegmentBuffer()
156 unsigned SIMachineFunctionInfo::addDispatchPtr(const SIRegisterInfo &TRI) { in addDispatchPtr()
163 unsigned SIMachineFunctionInfo::addQueuePtr(const SIRegisterInfo &TRI) { in addQueuePtr()
170 unsigned SIMachineFunctionInfo::addKernargSegmentPtr(const SIRegisterInfo &TRI) { in addKernargSegmentPtr()
177 unsigned SIMachineFunctionInfo::addFlatScratchInit(const SIRegisterInfo &TRI) { in addFlatScratchInit()
184 SIMachineFunctionInfo::SpilledReg SIMachineFunctionInfo::getSpilledReg ( in getSpilledReg()
226 unsigned SIMachineFunctionInfo::getMaximumWorkGroupSize( in getMaximumWorkGroupSize()
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| D | SIFrameLowering.cpp | 24 static bool hasOnlySGPRSpills(const SIMachineFunctionInfo *FuncInfo, in hasOnlySGPRSpills()
53 SIMachineFunctionInfo *MFI = MF.getInfo<SIMachineFunctionInfo>(); in emitPrologue()
305 const SIMachineFunctionInfo *MFI = MF.getInfo<SIMachineFunctionInfo>(); in emitDebuggerPrologue()
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| D | AMDGPUAsmPrinter.cpp | 126 const SIMachineFunctionInfo *MFI = MF->getInfo<SIMachineFunctionInfo>(); in EmitFunctionEntryLabel()
312 const SIMachineFunctionInfo *MFI = MF.getInfo<SIMachineFunctionInfo>(); in getSIProgramInfo()
582 const SIMachineFunctionInfo *MFI = MF.getInfo<SIMachineFunctionInfo>(); in EmitProgramInfoSI()
639 const SIMachineFunctionInfo *MFI = MF.getInfo<SIMachineFunctionInfo>(); in EmitAmdKernelCodeT()
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| D | SIRegisterInfo.cpp | 28 const SIMachineFunctionInfo &MFI = *MF.getInfo<SIMachineFunctionInfo>(); in getMaxWaveCountPerSIMD()
180 const SIMachineFunctionInfo *MFI = MF.getInfo<SIMachineFunctionInfo>(); in getReservedRegs()
501 SIMachineFunctionInfo *MFI = MF->getInfo<SIMachineFunctionInfo>(); in eliminateFrameIndex()
528 struct SIMachineFunctionInfo::SpilledReg Spill = in eliminateFrameIndex()
592 struct SIMachineFunctionInfo::SpilledReg Spill = in eliminateFrameIndex()
911 const SIMachineFunctionInfo *MFI = MF.getInfo<SIMachineFunctionInfo>(); in getPreloadedValue()
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