Searched refs:SI_SGPR_TES_OFFCHIP_LAYOUT (Results 1 – 3 of 3) sorted by relevance
184 SI_SGPR_TES_OFFCHIP_LAYOUT = SI_NUM_VS_STATE_RESOURCE_SGPRS, enumerator
289 radeon_set_sh_reg_seq(cs, tes_sh_base + SI_SGPR_TES_OFFCHIP_LAYOUT * 4, 2); in si_emit_derived_tess_state()
1142 ret = si_insert_input_ptr(ctx, ret, ctx->tcs_offchip_layout, 8 + SI_SGPR_TES_OFFCHIP_LAYOUT); in gfx10_emit_ngg_culling_epilogue()