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Searched refs:SLTIU (Results 1 – 13 of 13) sorted by relevance

/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/RISCV/
DRISCVInstrInfo.td413 def SLTIU : ALU_ri<0b011, "sltiu">;
599 def : InstAlias<"seqz $rd, $rs", (SLTIU GPR:$rd, GPR:$rs, 1)>;
739 (SLTIU GPR:$rd, GPR:$rs1, simm12:$imm12)>;
842 def : PatGprSimm12<setult, SLTIU>;
846 def : Pat<(seteq GPR:$rs1, 0), (SLTIU GPR:$rs1, 1)>;
847 def : Pat<(seteq GPR:$rs1, GPR:$rs2), (SLTIU (XOR GPR:$rs1, GPR:$rs2), 1)>;
849 (SLTIU (XORI GPR:$rs1, simm12:$imm12), 1)>;
DRISCVInstrInfoD.td304 (SLTIU (AND (FEQ_D FPR64:$rs1, FPR64:$rs1),
DRISCVInstrInfoF.td361 (SLTIU (AND (FEQ_S FPR32:$rs1, FPR32:$rs1),
/external/pcre/dist2/src/sljit/
DsljitNativeMIPS_32.c248 FAIL_IF(push_inst(compiler, SLTIU | S(src1) | TA(OTHER_FLAG) | IMM(src2), OTHER_FLAG)); in emit_single_op()
312 FAIL_IF(push_inst(compiler, SLTIU | S(src1) | TA(OTHER_FLAG) | IMM(src2), OTHER_FLAG)); in emit_single_op()
350 FAIL_IF(push_inst(compiler, SLTIU | S(src1) | TA(EQUAL_FLAG) | IMM(src2), EQUAL_FLAG)); in emit_single_op()
DsljitNativeMIPS_64.c339 FAIL_IF(push_inst(compiler, SLTIU | S(src1) | TA(OTHER_FLAG) | IMM(src2), OTHER_FLAG)); in emit_single_op()
403 FAIL_IF(push_inst(compiler, SLTIU | S(src1) | TA(OTHER_FLAG) | IMM(src2), OTHER_FLAG)); in emit_single_op()
441 FAIL_IF(push_inst(compiler, SLTIU | S(src1) | TA(EQUAL_FLAG) | IMM(src2), EQUAL_FLAG)); in emit_single_op()
DsljitNativeMIPS_common.c239 #define SLTIU (HI(11)) macro
2022 …PTR_FAIL_IF(push_inst(compiler, (type <= SLJIT_LESS_EQUAL ? SLTIU : SLTI) | S(src1) | T(TMP_REG1) … in sljit_emit_cmp()
2032 …PTR_FAIL_IF(push_inst(compiler, (type <= SLJIT_LESS_EQUAL ? SLTIU : SLTI) | S(src2) | T(TMP_REG1) … in sljit_emit_cmp()
2127 FAIL_IF(push_inst(compiler, SLTIU | SA(EQUAL_FLAG) | TA(dst_ar) | IMM(1), dst_ar)); in sljit_emit_op_flags()
2132 FAIL_IF(push_inst(compiler, SLTIU | SA(OTHER_FLAG) | TA(dst_ar) | IMM(1), dst_ar)); in sljit_emit_op_flags()
/external/llvm-project/llvm/lib/Target/RISCV/
DRISCVInstrInfo.td463 def SLTIU : ALU_ri<0b011, "sltiu">;
661 def : InstAlias<"seqz $rd, $rs", (SLTIU GPR:$rd, GPR:$rs, 1)>;
801 (SLTIU GPR:$rd, GPR:$rs1, simm12:$imm12)>;
904 def : PatGprSimm12<setult, SLTIU>;
908 def : Pat<(seteq GPR:$rs1, 0), (SLTIU GPR:$rs1, 1)>;
909 def : Pat<(seteq GPR:$rs1, GPR:$rs2), (SLTIU (XOR GPR:$rs1, GPR:$rs2), 1)>;
911 (SLTIU (ADDI GPR:$rs1, (NegImm simm12_plus1:$imm12)), 1)>;
DRISCVInstrInfoZfh.td327 (SLTIU (AND (FEQ_H FPR16:$rs1, FPR16:$rs1),
331 (SLTIU (FEQ_H $rs1, $rs1), 1)>;
DRISCVInstrInfoD.td313 (SLTIU (AND (FEQ_D FPR64:$rs1, FPR64:$rs1),
317 (SLTIU (FEQ_D $rs1, $rs1), 1)>;
DRISCVInstrInfoF.td369 (SLTIU (AND (FEQ_S FPR32:$rs1, FPR32:$rs1),
373 (SLTIU (FEQ_S $rs1, $rs1), 1)>;
/external/llvm-project/llvm/lib/Target/Mips/
DMips16InstrInfo.td1182 // Format: SLTIU rx, immediate MIPS16e
1201 // Format: SLTIU rx, immediate MIPS16e
/external/llvm/lib/Target/Mips/
DMips16InstrInfo.td1179 // Format: SLTIU rx, immediate MIPS16e
1198 // Format: SLTIU rx, immediate MIPS16e
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Mips/
DMips16InstrInfo.td1182 // Format: SLTIU rx, immediate MIPS16e
1201 // Format: SLTIU rx, immediate MIPS16e