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Searched refs:SLTx_CFG (Results 1 – 3 of 3) sorted by relevance

/external/arm-trusted-firmware/plat/imx/imx8m/imx8mq/
Dgpc.c60 mmio_setbits_32(IMX_GPC_BASE + SLTx_CFG(0), SLT_PLAT_PDN); in imx_pup_pdn_slot_config()
62 mmio_setbits_32(IMX_GPC_BASE + SLTx_CFG(1), SLT_PLAT_PUP); in imx_pup_pdn_slot_config()
64 mmio_setbits_32(IMX_GPC_BASE + SLTx_CFG(2), SLT_COREx_PUP(last_core)); in imx_pup_pdn_slot_config()
69 mmio_clrbits_32(IMX_GPC_BASE + SLTx_CFG(0), 0xFFFFFFFF); in imx_pup_pdn_slot_config()
70 mmio_clrbits_32(IMX_GPC_BASE + SLTx_CFG(1), 0xFFFFFFFF); in imx_pup_pdn_slot_config()
71 mmio_clrbits_32(IMX_GPC_BASE + SLTx_CFG(2), 0xFFFFFFFF); in imx_pup_pdn_slot_config()
/external/arm-trusted-firmware/plat/imx/imx8m/
Dgpc_common.c111 mmio_setbits_32(IMX_GPC_BASE + SLTx_CFG(0), PLAT_PDN_SLT_CTRL); in imx_a53_plat_slot_config()
112 mmio_setbits_32(IMX_GPC_BASE + SLTx_CFG(3), PLAT_PUP_SLT_CTRL); in imx_a53_plat_slot_config()
117 mmio_clrbits_32(IMX_GPC_BASE + SLTx_CFG(0), PLAT_PDN_SLT_CTRL); in imx_a53_plat_slot_config()
118 mmio_clrbits_32(IMX_GPC_BASE + SLTx_CFG(3), PLAT_PUP_SLT_CTRL); in imx_a53_plat_slot_config()
/external/arm-trusted-firmware/plat/imx/imx8m/include/
Dgpc.h25 #define SLTx_CFG(n) ((SLT0_CFG + ((n) * 4))) macro