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Searched refs:SMSTPCR0 (Results 1 – 2 of 2) sorted by relevance

/external/arm-trusted-firmware/plat/renesas/common/
Dbl2_cpg_init.c137 cpg_write(SMSTPCR0, 0x00210000U); in bl2_system_cpg_init_h3()
173 cpg_write(SMSTPCR0, 0x00200000U); in bl2_system_cpg_init_m3()
209 cpg_write(SMSTPCR0, 0x00210000U); in bl2_system_cpg_init_m3n()
243 cpg_write(SMSTPCR0, 0x00210000U); in bl2_system_cpg_init_v3m()
277 cpg_write(SMSTPCR0, 0x00210000U); in bl2_system_cpg_init_e3()
313 cpg_write(SMSTPCR0, 0x00010000U); in bl2_system_cpg_init_d3()
/external/arm-trusted-firmware/plat/renesas/common/include/registers/
Dcpg_registers.h112 #define SMSTPCR0 (CPG_BASE + 0x0130U) macro