Searched refs:SOC_CSS_PCIE_CONTROL_BASE (Results 1 – 3 of 3) sorted by relevance
71 mmio_write_32(SOC_CSS_PCIE_CONTROL_BASE + PCIE_SECURE_REG, in soc_css_init_pcie()
20 #define SOC_CSS_PCIE_CONTROL_BASE 0x7ff20000 macro
25 #define SOC_CSS_PCIE_CONTROL_BASE UL(0x0ef20000) macro