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Searched refs:SOPK (Results 1 – 25 of 27) sorted by relevance

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/external/mesa3d/src/amd/compiler/
Daco_opcodes.py37 SOPK = 3 variable in Format
63 if self == Format.SOPK:
355 SOPK = { variable
386 for (gfx6, gfx7, gfx8, gfx9, gfx10, name) in SOPK:
387 opcode(name, gfx7, gfx9, gfx10, Format.SOPK)
Daco_opt_value_numbering.cpp101 case Format::SOPK: in operator ()()
221 case Format::SOPK: { in operator ()()
Daco_spill.cpp246 … instr->format != Format::SOP1 && instr->format != Format::PSEUDO && instr->format != Format::SOPK) in should_rematerialize()
252 if (instr->format == Format::SOPK && instr->opcode != aco_opcode::s_movk_i32) in should_rematerialize()
273 …ormat::SOP1 || instr->format == Format::PSEUDO || instr->format == Format::SOPK) && "unsupported"); in do_reload()
284 } else if (instr->format == Format::SOPK) { in do_reload()
Daco_ir.h74 SOPK = 3, enumerator
931 format == Format::SOPK || in isSALU()
Daco_print_ir.cpp264 case Format::SOPK: { in print_instr_format_specific()
Daco_insert_NOPs.cpp738 …ction> wait{create_instruction<SOPK_instruction>(aco_opcode::s_waitcnt_vscnt, Format::SOPK, 0, 1)}; in handle_instruction_gfx10()
Daco_insert_waitcnt.cpp856 …waitcnt_vs = create_instruction<SOPK_instruction>(aco_opcode::s_waitcnt_vscnt, Format::SOPK, 0, 1); in emit_waitcnt()
Daco_assembler.cpp111 case Format::SOPK: { in emit_instruction()
/external/llvm/lib/Target/AMDGPU/
DSIInstrFormats.td28 field bits<1> SOPK = 0;
64 let TSFlags{8} = SOPK;
319 class SOPK <dag outs, dag ins, string asm, list<dag> pattern> :
326 let SOPK = 1;
DSIDefines.h25 SOPK = 1 << 8, enumerator
DSIInstrInfo.h232 return MI.getDesc().TSFlags & SIInstrFlags::SOPK; in isSOPK()
236 return get(Opcode).TSFlags & SIInstrFlags::SOPK; in isSOPK()
DSIInstrInfo.td892 SOPK <outs, ins, "", pattern>,
899 SOPK <outs, ins, asm, []>,
909 SOPK <outs, ins, asm, []>,
967 def _si : SOPK <outs, ins, asm, []>,
976 def _vi : SOPK <outs, ins, asm, []>,
DSIInstructions.td348 // SOPK Instructions
/external/llvm-project/llvm/lib/Target/AMDGPU/
DSIInstrFormats.td24 field bit SOPK = 0;
145 let TSFlags{5} = SOPK;
DSIDefines.h28 SOPK = 1 << 5, enumerator
DSIInstrInfo.h388 return MI.getDesc().TSFlags & SIInstrFlags::SOPK; in isSOPK()
392 return get(Opcode).TSFlags & SIInstrFlags::SOPK; in isSOPK()
DSOPInstructions.td671 // SOPK Instructions
684 let SOPK = 1;
872 let Size = 8; // Unlike every other SOPK instruction.
1599 // SOPK - GFX10.
1622 // SOPK - GFX6, GFX7.
DSIInstrInfo.td2444 // Get equivalent SOPK instruction.
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AMDGPU/
DSIInstrFormats.td24 field bit SOPK = 0;
137 let TSFlags{5} = SOPK;
DSIDefines.h28 SOPK = 1 << 5, enumerator
DSOPInstructions.td606 // SOPK Instructions
619 let SOPK = 1;
787 let Size = 8; // Unlike every other SOPK instruction.
1447 // SOPK - GFX10.
1470 // SOPK - GFX6, GFX7.
DSIInstrInfo.h382 return MI.getDesc().TSFlags & SIInstrFlags::SOPK; in isSOPK()
386 return get(Opcode).TSFlags & SIInstrFlags::SOPK; in isSOPK()
DSIInstrInfo.td2461 // Get equivalent SOPK instruction.
/external/llvm-project/llvm/docs/AMDGPU/
DAMDGPUAsmGFX7.rst574 SOPK section in Instructions
DAMDGPUAsmGFX8.rst600 SOPK section in Instructions

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