| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AMDGPU/ |
| D | SOPInstructions.td | 935 // SOPP Instructions
950 class SOPP <bits<7> op, dag ins, string asm, list<dag> pattern = []> :
957 let SOPP = 1;
964 def S_NOP : SOPP <0x00000000, (ins i16imm:$simm16), "s_nop $simm16">;
984 let SOPP = 1;
992 def "" : SOPP <op, ins, asm, pattern>;
998 def S_ENDPGM : SOPP <0x00000001, (ins EndpgmImm:$simm16), "s_endpgm$simm16"> {
1003 def S_ENDPGM_SAVED : SOPP <0x0000001B, (ins), "s_endpgm_saved"> {
1013 SOPP<0x01e, (ins), "s_endpgm_ordered_ps_done">;
1020 SOPP<0x01f, (ins), "s_code_end">;
[all …]
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| D | SIInstrFormats.td | 25 field bit SOPP = 0;
138 let TSFlags{6} = SOPP;
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| D | SIDefines.h | 29 SOPP = 1 << 6, enumerator
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| D | SIInstrInfo.h | 390 return MI.getDesc().TSFlags & SIInstrFlags::SOPP; in isSOPP()
394 return get(Opcode).TSFlags & SIInstrFlags::SOPP; in isSOPP()
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| D | SIInstrInfo.td | 2530 // Maps a SOPP to a SOPP with S_NOP
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| /external/mesa3d/src/amd/compiler/ |
| D | aco_statistics.cpp | 49 … if (instr->format == Format::SOPP && static_cast<SOPP_instruction*>(instr.get())->block != -1) in collect_preasm_stats()
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| D | aco_opcodes.py | 38 SOPP = 4 variable in Format
65 elif self == Format.SOPP:
497 SOPP = { variable
539 for (gfx6, gfx7, gfx8, gfx9, gfx10, name) in SOPP:
540 opcode(name, gfx7, gfx9, gfx10, Format.SOPP)
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| D | aco_insert_NOPs.cpp | 425 …SOPP_instruction> nop{create_instruction<SOPP_instruction>(aco_opcode::s_nop, Format::SOPP, 0, 0)}; in handle_instruction_gfx6()
623 …on> depctr{create_instruction<SOPP_instruction>(aco_opcode::s_waitcnt_depctr, Format::SOPP, 0, 0)}; in handle_instruction_gfx10()
662 …on> depctr{create_instruction<SOPP_instruction>(aco_opcode::s_waitcnt_depctr, Format::SOPP, 0, 0)}; in handle_instruction_gfx10()
695 if (instr->format != Format::SOPP) { in handle_instruction_gfx10()
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| D | aco_opt_value_numbering.cpp | 99 case Format::SOPP: in operator ()()
290 case Format::SOPP: in operator ()()
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| D | aco_insert_waitcnt.cpp | 842 case Format::SOPP: { in gen()
863 …ruction* waitcnt = create_instruction<SOPP_instruction>(aco_opcode::s_waitcnt, Format::SOPP, 0, 0); in emit_waitcnt()
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| D | README-ISA.md | 178 Any non-SOPP SALU instruction (except `s_setvskip`, `s_version`, and any non-lgkmcnt `s_waitcnt`).
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| D | aco_ir.h | 75 SOPP = 4, enumerator
932 format == Format::SOPP; in isSALU()
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| D | aco_print_ir.cpp | 269 case Format::SOPP: { in print_instr_format_specific()
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| D | aco_assembler.cpp | 159 case Format::SOPP: { in emit_instruction()
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| /external/llvm/docs/ |
| D | AMDGPUUsage.rst | 75 SOPP Instructions
78 Unless otherwise mentioned, all SOPP instructions that have one or more
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| /external/llvm/lib/Target/AMDGPU/ |
| D | SIInstrFormats.td | 29 field bits<1> SOPP = 0;
65 let TSFlags{9} = SOPP;
331 class SOPP <bits<7> op, dag ins, string asm, list<dag> pattern = []> :
338 let SOPP = 1;
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| D | SIDefines.h | 26 SOPP = 1 << 9, enumerator
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| D | SIInstructions.td | 421 // SOPP Instructions
424 def S_NOP : SOPP <0x00000000, (ins i16imm:$simm16), "s_nop $simm16">;
428 def S_ENDPGM : SOPP <0x00000001, (ins), "s_endpgm",
437 def S_BRANCH : SOPP <
444 def S_CBRANCH_SCC0 : SOPP <
448 def S_CBRANCH_SCC1 : SOPP <
456 def S_CBRANCH_VCCZ : SOPP <
460 def S_CBRANCH_VCCNZ : SOPP <
467 def S_CBRANCH_EXECZ : SOPP <
471 def S_CBRANCH_EXECNZ : SOPP <
[all …]
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| D | SIInstrInfo.h | 240 return MI.getDesc().TSFlags & SIInstrFlags::SOPP; in isSOPP()
244 return get(Opcode).TSFlags & SIInstrFlags::SOPP; in isSOPP()
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| /external/llvm-project/llvm/lib/Target/AMDGPU/ |
| D | SIInstrFormats.td | 25 field bit SOPP = 0;
146 let TSFlags{6} = SOPP;
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| D | SIDefines.h | 29 SOPP = 1 << 6, enumerator
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| D | SIInstrInfo.h | 396 return MI.getDesc().TSFlags & SIInstrFlags::SOPP; in isSOPP()
400 return get(Opcode).TSFlags & SIInstrFlags::SOPP; in isSOPP()
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| D | SOPInstructions.td | 1048 // SOPP Instructions
1060 let SOPP = 1;
1664 // SOPP - GFX6, GFX7, GFX8, GFX9, GFX10
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| D | SIInstrInfo.td | 2513 // Maps a SOPP to a SOPP with S_NOP
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| /external/llvm-project/llvm/docs/ |
| D | AMDGPUUsage.rst | 8837 SOPP subsubsection
8854 For full list of supported instructions, refer to "SOPP Instructions" in ISA
8858 of SOPP Instructions, so it is up to the programmer to be familiar with the
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