/external/arm-trusted-firmware/plat/imx/imx7/common/ |
D | imx7_bl2_el3_common.c | 43 return SPSR_MODE32(MODE32_svc, SPSR_T_ARM, SPSR_E_LITTLE, in imx7_get_spsr_for_bl32_entry() 49 return SPSR_MODE32(MODE32_svc, in imx7_get_spsr_for_bl33_entry()
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/external/arm-trusted-firmware/plat/qemu/common/ |
D | qemu_bl2_setup.c | 112 return SPSR_MODE32(MODE32_svc, SPSR_T_ARM, SPSR_E_LITTLE, in qemu_get_spsr_for_bl32_entry() 136 spsr = SPSR_MODE32(MODE32_svc, in qemu_get_spsr_for_bl33_entry()
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/external/arm-trusted-firmware/plat/xilinx/common/ |
D | plat_startup.c | 228 bl32->spsr = SPSR_MODE32(MODE32_svc, SPSR_T_ARM, in fsbl_atf_handover() 243 bl33->spsr = SPSR_MODE32(target_el, SPSR_T_ARM, in fsbl_atf_handover()
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/external/arm-trusted-firmware/plat/nvidia/tegra/soc/t132/ |
D | plat_sip_calls.c | 29 #define SPSR32 SPSR_MODE32(MODE32_svc, SPSR_T_ARM, SPSR_E_LITTLE, \
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/external/arm-trusted-firmware/plat/arm/common/aarch32/ |
D | arm_bl2_mem_params_desc.c | 46 .ep_info.spsr = SPSR_MODE32(MODE32_mon, SPSR_T_ARM,
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/external/arm-trusted-firmware/services/spd/opteed/ |
D | opteed_common.c | 51 optee_entry_point->spsr = SPSR_MODE32(MODE32_svc, SPSR_T_ARM, in opteed_init_optee_ep_state()
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/external/arm-trusted-firmware/plat/layerscape/common/ |
D | ls_common.c | 180 spsr = SPSR_MODE32(mode, plat_get_ns_image_entrypoint() & 0x1, in ls_get_spsr_for_bl33_entry()
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/external/arm-trusted-firmware/plat/mediatek/common/ |
D | mtk_plat_common.c | 118 spsr = SPSR_MODE32(mode, 0, ee, daif); in plat_get_spsr_for_bl33_entry()
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/external/arm-trusted-firmware/plat/arm/common/aarch64/ |
D | execution_state_switch.c | 129 spsr = SPSR_MODE32((u_register_t) el, in arm_execution_state_switch()
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/external/arm-trusted-firmware/plat/arm/common/ |
D | arm_common.c | 120 spsr = SPSR_MODE32(mode, plat_get_ns_image_entrypoint() & 0x1, in arm_get_spsr_for_bl33_entry()
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/external/arm-trusted-firmware/services/spd/tlkd/ |
D | tlkd_common.c | 100 spsr = SPSR_MODE32(MODE32_svc, in tlkd_init_tlk_ep_state()
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/external/arm-trusted-firmware/plat/hisilicon/poplar/ |
D | bl2_plat_setup.c | 92 spsr = SPSR_MODE32(mode, plat_get_ns_image_entrypoint() & 0x1, in poplar_get_spsr_for_bl33_entry()
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/external/arm-trusted-firmware/bl1/aarch32/ |
D | bl1_context_mgmt.c | 124 next_bl_ep->spsr = SPSR_MODE32(mode, SPSR_T_ARM, in bl1_prepare_next_image()
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/external/arm-trusted-firmware/plat/rpi/common/ |
D | rpi3_common.c | 216 return SPSR_MODE32(MODE32_hyp, SPSR_T_ARM, SPSR_E_LITTLE, in rpi3_get_spsr_for_bl33_entry()
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/external/arm-trusted-firmware/plat/imx/common/ |
D | imx_sip_handler.c | 210 next_image_info->spsr = SPSR_MODE32(mode, SPSR_T_ARM, SPSR_E_LITTLE, in imx_kernel_entry_handler()
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/external/arm-trusted-firmware/plat/hisilicon/hikey/ |
D | hikey_bl2_setup.c | 111 spsr = SPSR_MODE32(mode, plat_get_ns_image_entrypoint() & 0x1, in hikey_get_spsr_for_bl33_entry()
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/external/arm-trusted-firmware/lib/psci/ |
D | psci_common.c | 679 ep->spsr = SPSR_MODE32((uint64_t)mode, entrypoint & 0x1, ee, in psci_get_ns_ep_info() 726 ep->spsr = SPSR_MODE32(mode, entrypoint & 0x1, ee, aif); in psci_get_ns_ep_info()
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/external/arm-trusted-firmware/plat/hisilicon/hikey960/ |
D | hikey960_bl2_setup.c | 203 spsr = SPSR_MODE32(mode, plat_get_ns_image_entrypoint() & 0x1, in hikey960_get_spsr_for_bl33_entry()
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/external/arm-trusted-firmware/plat/mediatek/mt6795/ |
D | bl31_plat_setup.c | 398 SPSR_MODE32(mode, SPSR_T_ARM, SPSR_E_LITTLE, in bl31_plat_get_next_kernel32_ep_info()
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/external/arm-trusted-firmware/lib/cpus/aarch64/ |
D | wa_cve_2017_5715_bpiall.S | 66 movz w8, SPSR_MODE32(MODE32_svc, SPSR_T_ARM, SPSR_E_LITTLE, SPSR_AIF_MASK)
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/external/arm-trusted-firmware/services/std_svc/spmd/ |
D | spmd_main.c | 266 spmc_ep_info->spsr = SPSR_MODE32(MODE32_svc, SPSR_T_ARM, in spmd_spmc_init()
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/external/arm-trusted-firmware/services/spd/trusty/ |
D | trusty.c | 467 ep_info->spsr = SPSR_MODE32(MODE32_svc, SPSR_T_ARM, in trusty_setup()
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/external/arm-trusted-firmware/include/arch/aarch32/ |
D | arch.h | 401 #define SPSR_MODE32(mode, isa, endian, aif) \ macro
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/external/arm-trusted-firmware/include/arch/aarch64/ |
D | arch.h | 694 #define SPSR_MODE32(mode, isa, endian, aif) \ macro
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