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Searched refs:SPSR_MODE32 (Results 1 – 24 of 24) sorted by relevance

/external/arm-trusted-firmware/plat/imx/imx7/common/
Dimx7_bl2_el3_common.c43 return SPSR_MODE32(MODE32_svc, SPSR_T_ARM, SPSR_E_LITTLE, in imx7_get_spsr_for_bl32_entry()
49 return SPSR_MODE32(MODE32_svc, in imx7_get_spsr_for_bl33_entry()
/external/arm-trusted-firmware/plat/qemu/common/
Dqemu_bl2_setup.c112 return SPSR_MODE32(MODE32_svc, SPSR_T_ARM, SPSR_E_LITTLE, in qemu_get_spsr_for_bl32_entry()
136 spsr = SPSR_MODE32(MODE32_svc, in qemu_get_spsr_for_bl33_entry()
/external/arm-trusted-firmware/plat/xilinx/common/
Dplat_startup.c228 bl32->spsr = SPSR_MODE32(MODE32_svc, SPSR_T_ARM, in fsbl_atf_handover()
243 bl33->spsr = SPSR_MODE32(target_el, SPSR_T_ARM, in fsbl_atf_handover()
/external/arm-trusted-firmware/plat/nvidia/tegra/soc/t132/
Dplat_sip_calls.c29 #define SPSR32 SPSR_MODE32(MODE32_svc, SPSR_T_ARM, SPSR_E_LITTLE, \
/external/arm-trusted-firmware/plat/arm/common/aarch32/
Darm_bl2_mem_params_desc.c46 .ep_info.spsr = SPSR_MODE32(MODE32_mon, SPSR_T_ARM,
/external/arm-trusted-firmware/services/spd/opteed/
Dopteed_common.c51 optee_entry_point->spsr = SPSR_MODE32(MODE32_svc, SPSR_T_ARM, in opteed_init_optee_ep_state()
/external/arm-trusted-firmware/plat/layerscape/common/
Dls_common.c180 spsr = SPSR_MODE32(mode, plat_get_ns_image_entrypoint() & 0x1, in ls_get_spsr_for_bl33_entry()
/external/arm-trusted-firmware/plat/mediatek/common/
Dmtk_plat_common.c118 spsr = SPSR_MODE32(mode, 0, ee, daif); in plat_get_spsr_for_bl33_entry()
/external/arm-trusted-firmware/plat/arm/common/aarch64/
Dexecution_state_switch.c129 spsr = SPSR_MODE32((u_register_t) el, in arm_execution_state_switch()
/external/arm-trusted-firmware/plat/arm/common/
Darm_common.c120 spsr = SPSR_MODE32(mode, plat_get_ns_image_entrypoint() & 0x1, in arm_get_spsr_for_bl33_entry()
/external/arm-trusted-firmware/services/spd/tlkd/
Dtlkd_common.c100 spsr = SPSR_MODE32(MODE32_svc, in tlkd_init_tlk_ep_state()
/external/arm-trusted-firmware/plat/hisilicon/poplar/
Dbl2_plat_setup.c92 spsr = SPSR_MODE32(mode, plat_get_ns_image_entrypoint() & 0x1, in poplar_get_spsr_for_bl33_entry()
/external/arm-trusted-firmware/bl1/aarch32/
Dbl1_context_mgmt.c124 next_bl_ep->spsr = SPSR_MODE32(mode, SPSR_T_ARM, in bl1_prepare_next_image()
/external/arm-trusted-firmware/plat/rpi/common/
Drpi3_common.c216 return SPSR_MODE32(MODE32_hyp, SPSR_T_ARM, SPSR_E_LITTLE, in rpi3_get_spsr_for_bl33_entry()
/external/arm-trusted-firmware/plat/imx/common/
Dimx_sip_handler.c210 next_image_info->spsr = SPSR_MODE32(mode, SPSR_T_ARM, SPSR_E_LITTLE, in imx_kernel_entry_handler()
/external/arm-trusted-firmware/plat/hisilicon/hikey/
Dhikey_bl2_setup.c111 spsr = SPSR_MODE32(mode, plat_get_ns_image_entrypoint() & 0x1, in hikey_get_spsr_for_bl33_entry()
/external/arm-trusted-firmware/lib/psci/
Dpsci_common.c679 ep->spsr = SPSR_MODE32((uint64_t)mode, entrypoint & 0x1, ee, in psci_get_ns_ep_info()
726 ep->spsr = SPSR_MODE32(mode, entrypoint & 0x1, ee, aif); in psci_get_ns_ep_info()
/external/arm-trusted-firmware/plat/hisilicon/hikey960/
Dhikey960_bl2_setup.c203 spsr = SPSR_MODE32(mode, plat_get_ns_image_entrypoint() & 0x1, in hikey960_get_spsr_for_bl33_entry()
/external/arm-trusted-firmware/plat/mediatek/mt6795/
Dbl31_plat_setup.c398 SPSR_MODE32(mode, SPSR_T_ARM, SPSR_E_LITTLE, in bl31_plat_get_next_kernel32_ep_info()
/external/arm-trusted-firmware/lib/cpus/aarch64/
Dwa_cve_2017_5715_bpiall.S66 movz w8, SPSR_MODE32(MODE32_svc, SPSR_T_ARM, SPSR_E_LITTLE, SPSR_AIF_MASK)
/external/arm-trusted-firmware/services/std_svc/spmd/
Dspmd_main.c266 spmc_ep_info->spsr = SPSR_MODE32(MODE32_svc, SPSR_T_ARM, in spmd_spmc_init()
/external/arm-trusted-firmware/services/spd/trusty/
Dtrusty.c467 ep_info->spsr = SPSR_MODE32(MODE32_svc, SPSR_T_ARM, in trusty_setup()
/external/arm-trusted-firmware/include/arch/aarch32/
Darch.h401 #define SPSR_MODE32(mode, isa, endian, aif) \ macro
/external/arm-trusted-firmware/include/arch/aarch64/
Darch.h694 #define SPSR_MODE32(mode, isa, endian, aif) \ macro