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Searched refs:SRet (Results 1 – 16 of 16) sorted by relevance

/external/llvm/include/llvm/Target/
DTargetCallingConv.h34 static const uint64_t SRet = 1ULL<<3; ///< Hidden struct-ret ptr member
79 bool isSRet() const { return Flags & SRet; } in isSRet()
/external/clang/include/clang/CodeGen/
DCGFunctionInfo.h361 void setInAllocaSRet(bool SRet) { in setInAllocaSRet() argument
363 InAllocaSRet = SRet; in setInAllocaSRet()
/external/llvm-project/clang/include/clang/CodeGen/
DCGFunctionInfo.h441 void setInAllocaSRet(bool SRet) { in setInAllocaSRet() argument
443 InAllocaSRet = SRet; in setInAllocaSRet()
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AArch64/
DAArch64CallingConvention.td41 // In AAPCS, an SRet is passed in X8, not X0 like a normal pointer parameter.
42 // However, on windows, in some circumstances, the SRet is passed in X0 or X1
43 // instead. The presence of the inreg attribute indicates that SRet is
191 // An SRet is passed in X8, not X0 like a normal pointer parameter.
/external/llvm-project/llvm/lib/Target/AArch64/
DAArch64CallingConvention.td38 // In AAPCS, an SRet is passed in X8, not X0 like a normal pointer parameter.
39 // However, on windows, in some circumstances, the SRet is passed in X0 or X1
40 // instead. The presence of the inreg attribute indicates that SRet is
192 // An SRet is passed in X8, not X0 like a normal pointer parameter.
/external/llvm/lib/Target/Sparc/
DSparcCallingConv.td19 // Custom assign SRet to [sp+64].
/external/llvm-project/llvm/lib/Target/Sparc/
DSparcCallingConv.td18 // Custom assign SRet to [sp+64].
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Sparc/
DSparcCallingConv.td18 // Custom assign SRet to [sp+64].
/external/llvm/lib/Target/AArch64/
DAArch64CallingConvention.td36 // An SRet is passed in X8, not X0 like a normal pointer parameter.
127 // An SRet is passed in X8, not X0 like a normal pointer parameter.
/external/clang/utils/TableGen/
DNeonEmitter.cpp1299 bool SRet = getReturnType().getNumVectors() >= 2; in emitBodyAsBuiltinCall() local
1312 if (!getReturnType().isVoid() && !SRet) in emitBodyAsBuiltinCall()
1317 if (SRet) in emitBodyAsBuiltinCall()
1383 if (!SRet && !RetVar.getType().isVoid()) in emitBodyAsBuiltinCall()
/external/llvm-project/clang/utils/TableGen/
DNeonEmitter.cpp1284 bool SRet = getReturnType().getNumVectors() >= 2; in emitBodyAsBuiltinCall() local
1291 if (!getReturnType().isVoid() && !SRet) in emitBodyAsBuiltinCall()
1296 if (SRet) in emitBodyAsBuiltinCall()
1348 if (!SRet && !RetVar.getType().isVoid()) in emitBodyAsBuiltinCall()
/external/clang/lib/CodeGen/
DCGCall.cpp2693 llvm::Value *SRet = Builder.CreateStructGEP( in EmitFunctionEpilog() local
2695 RV = Builder.CreateAlignedLoad(SRet, getPointerAlign(), "sret"); in EmitFunctionEpilog()
/external/llvm-project/clang/lib/CodeGen/
DCGCall.cpp3236 llvm::Value *SRet = Builder.CreateStructGEP( in EmitFunctionEpilog() local
3238 RV = Builder.CreateAlignedLoad(SRet, getPointerAlign(), "sret"); in EmitFunctionEpilog()
/external/llvm/lib/Target/ARM/
DARMISelLowering.cpp6932 SDValue SRet; in LowerFSINCOS() local
6938 SRet = DAG.getFrameIndex(FrameIdx, TLI.getPointerTy(DL)); in LowerFSINCOS()
6941 Entry.Node = SRet; in LowerFSINCOS()
6974 SDValue LoadSin = DAG.getLoad(ArgVT, dl, CallResult.second, SRet, in LowerFSINCOS()
6978 SDValue Add = DAG.getNode(ISD::ADD, dl, PtrVT, SRet, in LowerFSINCOS()
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/ARM/
DARMISelLowering.cpp8891 SDValue SRet; in LowerFSINCOS() local
8897 SRet = DAG.getFrameIndex(FrameIdx, TLI.getPointerTy(DL)); in LowerFSINCOS()
8900 Entry.Node = SRet; in LowerFSINCOS()
8933 DAG.getLoad(ArgVT, dl, CallResult.second, SRet, MachinePointerInfo()); in LowerFSINCOS()
8936 SDValue Add = DAG.getNode(ISD::ADD, dl, PtrVT, SRet, in LowerFSINCOS()
/external/llvm-project/llvm/lib/Target/ARM/
DARMISelLowering.cpp9197 SDValue SRet; in LowerFSINCOS() local
9203 SRet = DAG.getFrameIndex(FrameIdx, TLI.getPointerTy(DL)); in LowerFSINCOS()
9206 Entry.Node = SRet; in LowerFSINCOS()
9239 DAG.getLoad(ArgVT, dl, CallResult.second, SRet, MachinePointerInfo()); in LowerFSINCOS()
9242 SDValue Add = DAG.getNode(ISD::ADD, dl, PtrVT, SRet, in LowerFSINCOS()