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/external/llvm-project/llvm/test/CodeGen/X86/
Dfp-roundeven.ll2 ; RUN: llc < %s -mtriple=x86_64-apple-darwin -mattr=+sse2 | FileCheck %s --check-prefix=SSE2
8 ; SSE2-LABEL: roundeven_f32:
9 ; SSE2: ## %bb.0:
10 ; SSE2-NEXT: jmp _roundevenf ## TAILCALL
26 ; SSE2-LABEL: roundeven_f64:
27 ; SSE2: ## %bb.0:
28 ; SSE2-NEXT: jmp _roundeven ## TAILCALL
44 ; SSE2-LABEL: roundeven_v4f32:
45 ; SSE2: ## %bb.0:
46 ; SSE2-NEXT: subq $56, %rsp
[all …]
Dftrunc.ll2 …: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse2 | FileCheck %s --check-prefixes=SSE,SSE2
7 ; SSE2-LABEL: trunc_unsigned_f32:
8 ; SSE2: # %bb.0:
9 ; SSE2-NEXT: cvttss2si %xmm0, %rax
10 ; SSE2-NEXT: movl %eax, %eax
11 ; SSE2-NEXT: xorps %xmm0, %xmm0
12 ; SSE2-NEXT: cvtsi2ss %rax, %xmm0
13 ; SSE2-NEXT: retq
30 ; SSE2-LABEL: trunc_unsigned_f64:
31 ; SSE2: # %bb.0:
[all …]
Dfp-round.ll2 ; RUN: llc < %s -mtriple=x86_64-apple-darwin -mattr=+sse2 | FileCheck %s --check-prefix=SSE2
8 ; SSE2-LABEL: round_f32:
9 ; SSE2: ## %bb.0:
10 ; SSE2-NEXT: jmp _roundf ## TAILCALL
45 ; SSE2-LABEL: round_f64:
46 ; SSE2: ## %bb.0:
47 ; SSE2-NEXT: jmp _round ## TAILCALL
73 ; SSE2-LABEL: round_v4f32:
74 ; SSE2: ## %bb.0:
75 ; SSE2-NEXT: subq $56, %rsp
[all …]
Dfunnel-shift.ll2 ; RUN: llc < %s -mtriple=i686-- -mattr=sse2 | FileCheck %s --check-prefixes=ANY,X32-SSE2
20 ; X32-SSE2-LABEL: fshl_i32:
21 ; X32-SSE2: # %bb.0:
22 ; X32-SSE2-NEXT: movb {{[0-9]+}}(%esp), %cl
23 ; X32-SSE2-NEXT: movl {{[0-9]+}}(%esp), %edx
24 ; X32-SSE2-NEXT: movl {{[0-9]+}}(%esp), %eax
25 ; X32-SSE2-NEXT: shldl %cl, %edx, %eax
26 ; X32-SSE2-NEXT: retl
42 ; X32-SSE2-LABEL: fshl_i37:
43 ; X32-SSE2: # %bb.0:
[all …]
Dvector-ext-logic.ll2 ; RUN: llc < %s -mtriple=x86_64-- -mattr=+sse2 | FileCheck %s --check-prefix=SSE2
6 ; SSE2-LABEL: zext_and_v8i32:
7 ; SSE2: # %bb.0:
8 ; SSE2-NEXT: movdqa %xmm0, %xmm2
9 ; SSE2-NEXT: pand %xmm1, %xmm2
10 ; SSE2-NEXT: pxor %xmm1, %xmm1
11 ; SSE2-NEXT: movdqa %xmm2, %xmm0
12 ; SSE2-NEXT: punpcklwd {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1],xmm0[2],xmm1[2],xmm0[3],x…
13 ; SSE2-NEXT: punpckhwd {{.*#+}} xmm2 = xmm2[4],xmm1[4],xmm2[5],xmm1[5],xmm2[6],xmm1[6],xmm2[7],x…
14 ; SSE2-NEXT: movdqa %xmm2, %xmm1
[all …]
Dvselect-minmax.ll2 …RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse2 | FileCheck %s --check-prefixes=SSE,SSE2
10 ; SSE2-LABEL: test1:
11 ; SSE2: # %bb.0: # %entry
12 ; SSE2-NEXT: movdqa %xmm1, %xmm2
13 ; SSE2-NEXT: pcmpgtb %xmm0, %xmm2
14 ; SSE2-NEXT: pand %xmm2, %xmm0
15 ; SSE2-NEXT: pandn %xmm1, %xmm2
16 ; SSE2-NEXT: por %xmm2, %xmm0
17 ; SSE2-NEXT: retq
35 ; SSE2-LABEL: test2:
[all …]
Dpr34080.ll2 ; RUN: llc < %s -mtriple=x86_64-apple-darwin -mattr=+sse2 | FileCheck %s --check-prefix=SSE2
3 … -mtriple=x86_64-apple-darwin -mattr=+sse2 -mcpu=x86-64 | FileCheck %s --check-prefix=SSE2-SCHEDULE
10 ; SSE2-LABEL: _Z1fe:
11 ; SSE2: ## %bb.0: ## %entry
12 ; SSE2-NEXT: pushq %rbp
13 ; SSE2-NEXT: .cfi_def_cfa_offset 16
14 ; SSE2-NEXT: .cfi_offset %rbp, -16
15 ; SSE2-NEXT: movq %rsp, %rbp
16 ; SSE2-NEXT: .cfi_def_cfa_register %rbp
17 ; SSE2-NEXT: fldt 16(%rbp)
[all …]
Dvector_splat-const-shift-of-constmasked.ll2 …: llc < %s -mtriple=i686-unknown -mattr=+sse2 | FileCheck %s --check-prefixes=X86-SSE2
5 …: llc < %s -mtriple=x86_64-unknown -mattr=+sse2 | FileCheck %s --check-prefixes=X64-SSE2
18 ; X86-SSE2-LABEL: test_128_i8_x_16_7_mask_lshr_1:
19 ; X86-SSE2: # %bb.0:
20 ; X86-SSE2-NEXT: pand {{\.LCPI.*}}, %xmm0
21 ; X86-SSE2-NEXT: psrlw $1, %xmm0
22 ; X86-SSE2-NEXT: pand {{\.LCPI.*}}, %xmm0
23 ; X86-SSE2-NEXT: retl
32 ; X64-SSE2-LABEL: test_128_i8_x_16_7_mask_lshr_1:
33 ; X64-SSE2: # %bb.0:
[all …]
Dvec_setcc-2.ll2 … llc < %s -o - -mtriple=x86_64-apple-darwin -mattr=+sse2 | FileCheck %s --check-prefixes=CHECK,SSE2
8 ; SSE2-LABEL: loop_no_const_reload:
9 ; SSE2: ## %bb.0: ## %entry
10 ; SSE2-NEXT: testl %edx, %edx
11 ; SSE2-NEXT: je LBB0_3
12 ; SSE2-NEXT: ## %bb.1: ## %for.body.preheader
13 ; SSE2-NEXT: xorl %eax, %eax
14 ; SSE2-NEXT: movdqa {{.*#+}} xmm0 = [25,25,25,25,25,25,25,25]
15 ; SSE2-NEXT: pxor %xmm1, %xmm1
16 ; SSE2-NEXT: .p2align 4, 0x90
[all …]
Dvector-reduce-smax.ll2 …RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse2 | FileCheck %s --check-prefixes=SSE,SSE2
15 ; SSE2-LABEL: test_v2i64:
16 ; SSE2: # %bb.0:
17 ; SSE2-NEXT: pshufd {{.*#+}} xmm1 = xmm0[2,3,2,3]
18 ; SSE2-NEXT: movdqa {{.*#+}} xmm2 = [2147483648,2147483648]
19 ; SSE2-NEXT: movdqa %xmm0, %xmm3
20 ; SSE2-NEXT: pxor %xmm2, %xmm3
21 ; SSE2-NEXT: pxor %xmm1, %xmm2
22 ; SSE2-NEXT: movdqa %xmm3, %xmm4
23 ; SSE2-NEXT: pcmpgtd %xmm2, %xmm4
[all …]
Dvector-reduce-smin.ll2 …RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse2 | FileCheck %s --check-prefixes=SSE,SSE2
15 ; SSE2-LABEL: test_v2i64:
16 ; SSE2: # %bb.0:
17 ; SSE2-NEXT: pshufd {{.*#+}} xmm1 = xmm0[2,3,2,3]
18 ; SSE2-NEXT: movdqa {{.*#+}} xmm2 = [2147483648,2147483648]
19 ; SSE2-NEXT: movdqa %xmm0, %xmm3
20 ; SSE2-NEXT: pxor %xmm2, %xmm3
21 ; SSE2-NEXT: pxor %xmm1, %xmm2
22 ; SSE2-NEXT: movdqa %xmm2, %xmm4
23 ; SSE2-NEXT: pcmpgtd %xmm3, %xmm4
[all …]
Dvector-reduce-umin.ll2 …RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse2 | FileCheck %s --check-prefixes=SSE,SSE2
15 ; SSE2-LABEL: test_v2i64:
16 ; SSE2: # %bb.0:
17 ; SSE2-NEXT: pshufd {{.*#+}} xmm1 = xmm0[2,3,2,3]
18 ; SSE2-NEXT: movdqa {{.*#+}} xmm2 = [9223372039002259456,9223372039002259456]
19 ; SSE2-NEXT: movdqa %xmm0, %xmm3
20 ; SSE2-NEXT: pxor %xmm2, %xmm3
21 ; SSE2-NEXT: pxor %xmm1, %xmm2
22 ; SSE2-NEXT: movdqa %xmm2, %xmm4
23 ; SSE2-NEXT: pcmpgtd %xmm3, %xmm4
[all …]
Dwiden_conv-3.ll2 ; RUN: llc < %s -mtriple=i686-unknown -mattr=+sse2 | FileCheck %s --check-prefix=X86-SSE2
4 ; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+sse2 | FileCheck %s --check-prefix=X64-SSE2
10 ; X86-SSE2-LABEL: convert_v2i16_to_v2f32:
11 ; X86-SSE2: # %bb.0: # %entry
12 ; X86-SSE2-NEXT: movl {{[0-9]+}}(%esp), %eax
13 ; X86-SSE2-NEXT: punpcklwd {{.*#+}} xmm0 = xmm0[0,0,1,1,2,2,3,3]
14 ; X86-SSE2-NEXT: psrad $16, %xmm0
15 ; X86-SSE2-NEXT: cvtdq2ps %xmm0, %xmm0
16 ; X86-SSE2-NEXT: movlps %xmm0, (%eax)
17 ; X86-SSE2-NEXT: retl
[all …]
Dfunnel-shift-rot.ll2 ; RUN: llc < %s -mtriple=i686-- -mattr=sse2 | FileCheck %s --check-prefixes=ANY,X32-SSE2
20 ; X32-SSE2-LABEL: rotl_i8_const_shift:
21 ; X32-SSE2: # %bb.0:
22 ; X32-SSE2-NEXT: movb {{[0-9]+}}(%esp), %al
23 ; X32-SSE2-NEXT: rolb $3, %al
24 ; X32-SSE2-NEXT: retl
37 ; X32-SSE2-LABEL: rotl_i8_const_shift1:
38 ; X32-SSE2: # %bb.0:
39 ; X32-SSE2-NEXT: movb {{[0-9]+}}(%esp), %al
40 ; X32-SSE2-NEXT: rolb %al
[all …]
Dwiden_conv-4.ll2 ; RUN: llc < %s -mtriple=i686-unknown -mattr=+sse2 | FileCheck %s --check-prefix=X86-SSE2
4 ; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+sse2 | FileCheck %s --check-prefix=X64-SSE2
10 ; X86-SSE2-LABEL: convert_v7i16_v7f32:
11 ; X86-SSE2: # %bb.0: # %entry
12 ; X86-SSE2-NEXT: movl {{[0-9]+}}(%esp), %eax
13 ; X86-SSE2-NEXT: pxor %xmm1, %xmm1
14 ; X86-SSE2-NEXT: movdqa %xmm0, %xmm2
15 ; X86-SSE2-NEXT: punpckhwd {{.*#+}} xmm2 = xmm2[4],xmm1[4],xmm2[5],xmm1[5],xmm2[6],xmm1[6],xmm2[…
16 ; X86-SSE2-NEXT: cvtdq2ps %xmm2, %xmm2
17 ; X86-SSE2-NEXT: punpcklwd {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1],xmm0[2],xmm1[2],xmm0[…
[all …]
/external/llvm/test/Analysis/CostModel/X86/
Dtestshiftshl.ll1 ; RUN: llc -mtriple=x86_64-apple-darwin -mcpu=core2 < %s | FileCheck --check-prefix=SSE2-CODEGEN %s
2 …triple=x86_64-apple-darwin -mcpu=core2 -cost-model -analyze < %s | FileCheck --check-prefix=SSE2 %s
7 ; SSE2: shift2i16
8 ; SSE2: cost of 4 {{.*}} shl
9 ; SSE2-CODEGEN: shift2i16
10 ; SSE2-CODEGEN: psllq
19 ; SSE2: shift4i16
20 ; SSE2: cost of 10 {{.*}} shl
21 ; SSE2-CODEGEN: shift4i16
22 ; SSE2-CODEGEN: pmuludq
[all …]
Dtestshiftlshr.ll1 ; RUN: llc -mtriple=x86_64-apple-darwin -mcpu=core2 < %s | FileCheck --check-prefix=SSE2-CODEGEN %s
2 …triple=x86_64-apple-darwin -mcpu=core2 -cost-model -analyze < %s | FileCheck --check-prefix=SSE2 %s
7 ; SSE2: shift2i16
8 ; SSE2: cost of 4 {{.*}} lshr
9 ; SSE2-CODEGEN: shift2i16
10 ; SSE2-CODEGEN: psrlq
19 ; SSE2: shift4i16
20 ; SSE2: cost of 16 {{.*}} lshr
21 ; SSE2-CODEGEN: shift4i16
22 ; SSE2-CODEGEN: psrld
[all …]
Dtestshiftashr.ll1 ; RUN: llc -mtriple=x86_64-apple-darwin -mcpu=core2 < %s | FileCheck --check-prefix=SSE2-CODEGEN %s
2 …triple=x86_64-apple-darwin -mcpu=core2 -cost-model -analyze < %s | FileCheck --check-prefix=SSE2 %s
7 ; SSE2: shift2i16
8 ; SSE2: cost of 12 {{.*}} ashr
9 ; SSE2-CODEGEN: shift2i16
10 ; SSE2-CODEGEN: psrlq
19 ; SSE2: shift4i16
20 ; SSE2: cost of 16 {{.*}} ashr
21 ; SSE2-CODEGEN: shift4i16
22 ; SSE2-CODEGEN: psrad
[all …]
/external/llvm-project/llvm/test/Analysis/CostModel/X86/
Dtestshiftlshr.ll1 ; RUN: llc -mtriple=x86_64-apple-darwin -mcpu=core2 < %s | FileCheck --check-prefix=SSE2-CODEGEN %s
2 …triple=x86_64-apple-darwin -mcpu=core2 -cost-model -analyze < %s | FileCheck --check-prefix=SSE2 %s
7 ; SSE2-LABEL: shift2i16
8 ; SSE2: cost of 32 {{.*}} lshr
9 ; SSE2-CODEGEN-LABEL: shift2i16
10 ; SSE2-CODEGEN: psrlw
19 ; SSE2-LABEL: shift4i16
20 ; SSE2: cost of 32 {{.*}} lshr
21 ; SSE2-CODEGEN-LABEL: shift4i16
22 ; SSE2-CODEGEN: psrlw
[all …]
Dtestshiftashr.ll1 ; RUN: llc -mtriple=x86_64-apple-darwin -mcpu=core2 < %s | FileCheck --check-prefix=SSE2-CODEGEN %s
2 …triple=x86_64-apple-darwin -mcpu=core2 -cost-model -analyze < %s | FileCheck --check-prefix=SSE2 %s
7 ; SSE2-LABEL: shift2i16
8 ; SSE2: cost of 32 {{.*}} ashr
9 ; SSE2-CODEGEN-LABEL: shift2i16
10 ; SSE2-CODEGEN: psraw
19 ; SSE2-LABEL: shift4i16
20 ; SSE2: cost of 32 {{.*}} ashr
21 ; SSE2-CODEGEN-LABEL: shift4i16
22 ; SSE2-CODEGEN: psraw
[all …]
Dtestshiftshl.ll1 ; RUN: llc -mtriple=x86_64-apple-darwin -mcpu=core2 < %s | FileCheck --check-prefix=SSE2-CODEGEN %s
2 …triple=x86_64-apple-darwin -mcpu=core2 -cost-model -analyze < %s | FileCheck --check-prefix=SSE2 %s
7 ; SSE2-LABEL: shift2i16
8 ; SSE2: cost of 32 {{.*}} shl
9 ; SSE2-CODEGEN-LABEL: shift2i16
10 ; SSE2-CODEGEN: pmullw
19 ; SSE2-LABEL: shift4i16
20 ; SSE2: cost of 32 {{.*}} shl
21 ; SSE2-CODEGEN-LABEL: shift4i16
22 ; SSE2-CODEGEN: pmullw
[all …]
/external/llvm/test/CodeGen/X86/
Dvselect-minmax.ll2 … -mtriple=x86_64-unknown-unknown -mattr=+sse2 | FileCheck %s --check-prefix=SSE --check-prefix=SSE2
10 ; SSE2-LABEL: test1:
11 ; SSE2: # BB#0: # %entry
12 ; SSE2-NEXT: movdqa %xmm1, %xmm2
13 ; SSE2-NEXT: pcmpgtb %xmm0, %xmm2
14 ; SSE2-NEXT: pand %xmm2, %xmm0
15 ; SSE2-NEXT: pandn %xmm1, %xmm2
16 ; SSE2-NEXT: por %xmm2, %xmm0
17 ; SSE2-NEXT: retq
35 ; SSE2-LABEL: test2:
[all …]
Dwiden_conv-4.ll2 …c < %s -mtriple=i686-unknown -mattr=+sse2 | FileCheck %s --check-prefix=X86 --check-prefix=X86-SSE2
4 …< %s -mtriple=x86_64-unknown -mattr=+sse2 | FileCheck %s --check-prefix=X64 --check-prefix=X64-SSE2
10 ; X86-SSE2-LABEL: convert_v7i16_v7f32:
11 ; X86-SSE2: # BB#0: # %entry
12 ; X86-SSE2-NEXT: movl {{[0-9]+}}(%esp), %eax
13 ; X86-SSE2-NEXT: pxor %xmm1, %xmm1
14 ; X86-SSE2-NEXT: movdqa %xmm0, %xmm2
15 ; X86-SSE2-NEXT: punpckhwd {{.*#+}} xmm2 = xmm2[4],xmm1[4],xmm2[5],xmm1[5],xmm2[6],xmm1[6],xmm2[…
16 ; X86-SSE2-NEXT: cvtdq2ps %xmm2, %xmm2
17 ; X86-SSE2-NEXT: punpcklwd {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1],xmm0[2],xmm1[2],xmm0[…
[all …]
Dwiden_conv-3.ll2 …c < %s -mtriple=i686-unknown -mattr=+sse2 | FileCheck %s --check-prefix=X86 --check-prefix=X86-SSE2
4 …< %s -mtriple=x86_64-unknown -mattr=+sse2 | FileCheck %s --check-prefix=X64 --check-prefix=X64-SSE2
10 ; X86-SSE2-LABEL: convert_v2i16_to_v2f32:
11 ; X86-SSE2: # BB#0: # %entry
12 ; X86-SSE2-NEXT: movl {{[0-9]+}}(%esp), %eax
13 ; X86-SSE2-NEXT: psllq $48, %xmm0
14 ; X86-SSE2-NEXT: psrad $16, %xmm0
15 ; X86-SSE2-NEXT: pshufd {{.*#+}} xmm0 = xmm0[1,3,2,3]
16 ; X86-SSE2-NEXT: cvtdq2ps %xmm0, %xmm0
17 ; X86-SSE2-NEXT: movss %xmm0, (%eax)
[all …]
Dvector-bitreverse.ll2 …known-unknown -mattr=+sse2 | FileCheck %s --check-prefix=ALL --check-prefix=SSE --check-prefix=SSE2
1022 ; SSE2-LABEL: test_bitreverse_v16i8:
1023 ; SSE2: # BB#0:
1024 ; SSE2-NEXT: movdqa %xmm0, %xmm2
1025 ; SSE2-NEXT: psrlw $7, %xmm2
1026 ; SSE2-NEXT: movdqa {{.*#+}} xmm1 = [1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1]
1027 ; SSE2-NEXT: pand %xmm1, %xmm1
1028 ; SSE2-NEXT: pand %xmm2, %xmm1
1029 ; SSE2-NEXT: movdqa %xmm0, %xmm2
1030 ; SSE2-NEXT: psllw $7, %xmm2
[all …]

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