| /external/llvm-project/llvm/test/CodeGen/AMDGPU/GlobalISel/ |
| D | irtranslator-sat.ll | 250 ; CHECK: [[SSUBSAT:%[0-9]+]]:_(s16) = G_SSUBSAT [[TRUNC]], [[TRUNC1]]
251 ; CHECK: [[ANYEXT:%[0-9]+]]:_(s32) = G_ANYEXT [[SSUBSAT]](s16)
267 ; CHECK: [[SSUBSAT:%[0-9]+]]:_(s32) = G_SSUBSAT [[COPY]], [[COPY1]]
268 ; CHECK: $vgpr0 = COPY [[SSUBSAT]](s32)
287 ; CHECK: [[SSUBSAT:%[0-9]+]]:_(s64) = G_SSUBSAT [[MV]], [[MV1]]
288 ; CHECK: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[SSUBSAT]](s64)
309 ; CHECK: [[SSUBSAT:%[0-9]+]]:_(<2 x s32>) = G_SSUBSAT [[BUILD_VECTOR]], [[BUILD_VECTOR1]]
310 ; CHECK: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[SSUBSAT]](<2 x s32>)
|
| D | legalize-ssubsat.mir | 62 ; GFX9: [[SSUBSAT:%[0-9]+]]:_(s16) = G_SSUBSAT [[SHL]], [[SHL1]]
63 ; GFX9: [[ASHR:%[0-9]+]]:_(s16) = G_ASHR [[SSUBSAT]], [[C]](s16)
131 ; GFX9: [[SSUBSAT:%[0-9]+]]:_(s16) = G_SSUBSAT [[SHL]], [[SHL1]]
132 ; GFX9: [[ASHR:%[0-9]+]]:_(s16) = G_ASHR [[SSUBSAT]], [[C]](s16)
273 ; GFX9: [[SSUBSAT:%[0-9]+]]:_(<2 x s16>) = G_SSUBSAT [[SHL]], [[SHL1]]
274 ; GFX9: [[ASHR:%[0-9]+]]:_(<2 x s16>) = G_ASHR [[SSUBSAT]], [[BUILD_VECTOR_TRUNC2]](<2 x s16>)
349 ; GFX9: [[SSUBSAT:%[0-9]+]]:_(s16) = G_SSUBSAT [[TRUNC]], [[TRUNC1]]
350 ; GFX9: [[ANYEXT:%[0-9]+]]:_(s32) = G_ANYEXT [[SSUBSAT]](s16)
449 ; GFX9: [[SSUBSAT:%[0-9]+]]:_(<2 x s16>) = G_SSUBSAT [[COPY]], [[COPY1]]
450 ; GFX9: $vgpr0 = COPY [[SSUBSAT]](<2 x s16>)
[all …]
|
| /external/swiftshader/third_party/llvm-10.0/llvm/include/llvm/CodeGen/ |
| D | ISDOpcodes.h | 274 SSUBSAT, USUBSAT, enumerator
|
| /external/llvm-project/llvm/include/llvm/CodeGen/ |
| D | ISDOpcodes.h | 329 SSUBSAT, enumerator
|
| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/X86/ |
| D | X86TargetTransformInfo.cpp | 1928 { ISD::SSUBSAT, MVT::v32i16, 1 }, in getIntrinsicInstrCost()
1929 { ISD::SSUBSAT, MVT::v64i8, 1 }, in getIntrinsicInstrCost()
1989 { ISD::SSUBSAT, MVT::v16i16, 1 }, in getIntrinsicInstrCost()
1990 { ISD::SSUBSAT, MVT::v32i8, 1 }, in getIntrinsicInstrCost()
2026 { ISD::SSUBSAT, MVT::v16i16, 4 }, // 2 x 128-bit Op + extract/insert in getIntrinsicInstrCost()
2027 { ISD::SSUBSAT, MVT::v32i8, 4 }, // 2 x 128-bit Op + extract/insert in getIntrinsicInstrCost()
2102 { ISD::SSUBSAT, MVT::v8i16, 1 }, in getIntrinsicInstrCost()
2103 { ISD::SSUBSAT, MVT::v16i8, 1 }, in getIntrinsicInstrCost()
2180 ISD = ISD::SSUBSAT; in getIntrinsicInstrCost()
|
| /external/llvm-project/llvm/lib/Target/X86/ |
| D | X86TargetTransformInfo.cpp | 2333 { ISD::SSUBSAT, MVT::v32i16, 1 }, in getTypeBasedIntrinsicInstrCost()
2334 { ISD::SSUBSAT, MVT::v64i8, 1 }, in getTypeBasedIntrinsicInstrCost()
2401 { ISD::SSUBSAT, MVT::v32i16, 2 }, // FIXME: include split in getTypeBasedIntrinsicInstrCost()
2402 { ISD::SSUBSAT, MVT::v64i8, 2 }, // FIXME: include split in getTypeBasedIntrinsicInstrCost()
2462 { ISD::SSUBSAT, MVT::v16i16, 1 }, in getTypeBasedIntrinsicInstrCost()
2463 { ISD::SSUBSAT, MVT::v32i8, 1 }, in getTypeBasedIntrinsicInstrCost()
2517 { ISD::SSUBSAT, MVT::v16i16, 4 }, // 2 x 128-bit Op + extract/insert in getTypeBasedIntrinsicInstrCost()
2518 { ISD::SSUBSAT, MVT::v32i8, 4 }, // 2 x 128-bit Op + extract/insert in getTypeBasedIntrinsicInstrCost()
2625 { ISD::SSUBSAT, MVT::v8i16, 1 }, in getTypeBasedIntrinsicInstrCost()
2626 { ISD::SSUBSAT, MVT::v16i8, 1 }, in getTypeBasedIntrinsicInstrCost()
[all …]
|
| /external/llvm-project/llvm/lib/CodeGen/SelectionDAG/ |
| D | LegalizeVectorOps.cpp | 454 case ISD::SSUBSAT: in LegalizeOp()
837 case ISD::SSUBSAT: in Expand()
|
| D | SelectionDAGDumper.cpp | 313 case ISD::SSUBSAT: return "ssubsat"; in getOperationName()
|
| D | LegalizeVectorTypes.cpp | 130 case ISD::SSUBSAT: in ScalarizeVectorResult()
998 case ISD::SSUBSAT: in SplitVectorResult()
2890 case ISD::SSUBSAT: in WidenVectorResult()
|
| D | LegalizeIntegerTypes.cpp | 160 case ISD::SSUBSAT: in PromoteIntegerResult()
760 case ISD::SSUBSAT: in PromoteIntRes_ADDSUBSHLSAT()
2140 case ISD::SSUBSAT: in ExpandIntegerResult()
|
| D | SelectionDAG.cpp | 4801 case ISD::SSUBSAT: return C1.ssub_sat(C2); in FoldValue()
5262 case ISD::SSUBSAT: in getNode()
5573 case ISD::SSUBSAT: in getNode()
5598 case ISD::SSUBSAT: in getNode()
|
| D | LegalizeDAG.cpp | 1136 case ISD::SSUBSAT: in LegalizeOp()
3545 case ISD::SSUBSAT: in ExpandNode()
|
| /external/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/SelectionDAG/ |
| D | SelectionDAGDumper.cpp | 307 case ISD::SSUBSAT: return "ssubsat"; in getOperationName()
|
| D | LegalizeVectorOps.cpp | 457 case ISD::SSUBSAT: in LegalizeOp()
947 case ISD::SSUBSAT: in Expand()
|
| D | LegalizeIntegerTypes.cpp | 155 case ISD::SSUBSAT: in PromoteIntegerResult()
695 case ISD::SSUBSAT: in PromoteIntRes_ADDSUBSAT()
1908 case ISD::SSUBSAT: in ExpandIntegerResult()
|
| D | LegalizeVectorTypes.cpp | 127 case ISD::SSUBSAT: in ScalarizeVectorResult()
937 case ISD::SSUBSAT: in SplitVectorResult()
2730 case ISD::SSUBSAT: in WidenVectorResult()
|
| D | SelectionDAG.cpp | 4808 case ISD::SSUBSAT: return C1.ssub_sat(C2); in FoldValue()
5204 case ISD::SSUBSAT: in getNode()
5474 case ISD::SSUBSAT: in getNode()
5499 case ISD::SSUBSAT: in getNode()
|
| D | LegalizeDAG.cpp | 1124 case ISD::SSUBSAT: in LegalizeOp()
3412 case ISD::SSUBSAT: in ExpandNode()
|
| /external/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/ |
| D | TargetLoweringBase.cpp | 655 setOperationAction(ISD::SSUBSAT, VT, Expand); in initActions()
|
| /external/llvm-project/llvm/lib/CodeGen/ |
| D | TargetLoweringBase.cpp | 765 setOperationAction(ISD::SSUBSAT, VT, Expand); in initActions()
|
| /external/llvm-project/llvm/lib/Target/AMDGPU/ |
| D | SIISelLowering.cpp | 499 setOperationAction(ISD::SSUBSAT, MVT::i16, Legal); in SITargetLowering()
501 setOperationAction(ISD::SSUBSAT, MVT::i32, Legal); in SITargetLowering()
725 setOperationAction(ISD::SSUBSAT, MVT::v2i16, Legal); in SITargetLowering()
757 setOperationAction(ISD::SSUBSAT, MVT::v4i16, Custom); in SITargetLowering()
4588 case ISD::SSUBSAT: in LowerOperation()
|
| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/ARM/ |
| D | ARMISelLowering.cpp | 219 for (auto Opcode : {ISD::SADDSAT, ISD::UADDSAT, ISD::SSUBSAT, ISD::USUBSAT}) in addTypeForNEON()
279 setOperationAction(ISD::SSUBSAT, VT, Legal); in addMVEVectorTypes()
1049 setOperationAction(ISD::SSUBSAT, MVT::i8, Custom); in ARMTargetLowering()
1051 setOperationAction(ISD::SSUBSAT, MVT::i16, Custom); in ARMTargetLowering()
1055 setOperationAction(ISD::SSUBSAT, MVT::i32, Legal); in ARMTargetLowering()
9360 case ISD::SSUBSAT: in LowerOperation()
9450 case ISD::SSUBSAT: in ReplaceNodeResults()
|
| /external/swiftshader/third_party/llvm-10.0/llvm/include/llvm/Target/ |
| D | TargetSelectionDAG.td | 396 def ssubsat : SDNode<"ISD::SSUBSAT" , SDTIntBinOp>;
|
| /external/llvm-project/llvm/lib/Target/ARM/ |
| D | ARMISelLowering.cpp | 221 for (auto Opcode : {ISD::SADDSAT, ISD::UADDSAT, ISD::SSUBSAT, ISD::USUBSAT}) in addTypeForNEON()
281 setOperationAction(ISD::SSUBSAT, VT, Legal); in addMVEVectorTypes()
1100 setOperationAction(ISD::SSUBSAT, MVT::i8, Custom); in ARMTargetLowering()
1102 setOperationAction(ISD::SSUBSAT, MVT::i16, Custom); in ARMTargetLowering()
1106 setOperationAction(ISD::SSUBSAT, MVT::i32, Legal); in ARMTargetLowering()
9791 case ISD::SSUBSAT: in LowerOperation()
9891 case ISD::SSUBSAT: in ReplaceNodeResults()
|
| /external/llvm-project/llvm/include/llvm/Target/ |
| D | TargetSelectionDAG.td | 399 def ssubsat : SDNode<"ISD::SSUBSAT" , SDTIntBinOp>;
|