| /external/llvm-project/llvm/test/CodeGen/SystemZ/ |
| D | branch-folder-hoist-livein.mir | 37 STH renamable $r1l, killed renamable $r3d, 0, $noreg, implicit killed $r4d :: (store 1 into @d)
43 STH renamable $r1l, killed renamable $r3d, 0, $noreg, implicit killed $r4d :: (store 1 into @d)
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| D | int-move-05.ll | 34 ; Check the high end of the STH range.
44 ; Check the next halfword up, which should use STHY instead of STH.
108 ; Check that STH allows an index.
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| D | cond-store-02.ll | 178 ; Check the high end of the aligned STH range.
194 ; Check the next halfword up, which should use STHY instead of STH.
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| /external/llvm/test/CodeGen/SystemZ/ |
| D | int-move-05.ll | 34 ; Check the high end of the STH range.
44 ; Check the next halfword up, which should use STHY instead of STH.
108 ; Check that STH allows an index.
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| D | cond-store-02.ll | 178 ; Check the high end of the aligned STH range.
194 ; Check the next halfword up, which should use STHY instead of STH.
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| /external/llvm-project/lld/ELF/Arch/ |
| D | PPCInsns.def | 19 PCREL_OPT(STH, PSTH, OPC_AND_RST);
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| D | PPC64.cpp | 55 STH = 44, enumerator
85 STH = 0xb0000000, enumerator
846 return STH; in getPPCDFormOp()
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/BPF/ |
| D | BPFInstrInfo.cpp | 62 StOpc = BPF::STH; in expandMEMCPY()
101 BuildMI(*BB, MI, dl, get(BPF::STH)) in expandMEMCPY()
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| D | BPFMISimplifyPatchable.cpp | 109 Opcode == BPF::LDD || Opcode == BPF::STB || Opcode == BPF::STH || in checkADDrr()
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| D | BPFInstrInfo.td | 416 def STH : STOREi64<BPF_H, "u16", truncstorei16>;
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| /external/llvm-project/llvm/lib/Target/BPF/ |
| D | BPFInstrInfo.cpp | 62 StOpc = BPF::STH; in expandMEMCPY()
101 BuildMI(*BB, MI, dl, get(BPF::STH)) in expandMEMCPY()
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| D | BPFMISimplifyPatchable.cpp | 112 Opcode == BPF::LDD || Opcode == BPF::STB || Opcode == BPF::STH || in checkADDrr()
130 if (Opcode == BPF::STB || Opcode == BPF::STH || Opcode == BPF::STW || in checkADDrr()
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| /external/llvm-project/llvm/test/CodeGen/PowerPC/ |
| D | two-address-crash.mir | 87 STH killed %11, 0, killed %3 :: (store 2 into %ir.P)
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| /external/llvm-project/llvm/lib/Target/PowerPC/ |
| D | PPCPreEmitPeephole.cpp | 67 case PPC::STH: in hasPCRelativeForm()
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| D | PPCFastISel.cpp | 640 Opc = Is32BitInt ? PPC::STH : PPC::STH8; in PPCEmitStore()
711 case PPC::STH : Opc = PPC::STHX; break; in PPCEmitStore()
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| D | PPCRegisterInfo.cpp | 105 ImmToIdxMap[PPC::STH] = PPC::STHX; ImmToIdxMap[PPC::STW] = PPC::STWX; in PPCRegisterInfo()
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| /external/llvm/lib/Target/BPF/ |
| D | BPFInstrInfo.td | 320 def STH : STOREi64<0x1, "sth", truncstorei16>;
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| /external/llvm/lib/Target/PowerPC/ |
| D | PPCFastISel.cpp | 635 Opc = Is32BitInt ? PPC::STH : PPC::STH8; in PPCEmitStore()
705 case PPC::STH : Opc = PPC::STHX; break; in PPCEmitStore()
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| D | PPCRegisterInfo.cpp | 70 ImmToIdxMap[PPC::STH] = PPC::STHX; ImmToIdxMap[PPC::STW] = PPC::STWX; in PPCRegisterInfo()
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/PowerPC/ |
| D | PPCFastISel.cpp | 639 Opc = Is32BitInt ? PPC::STH : PPC::STH8; in PPCEmitStore()
710 case PPC::STH : Opc = PPC::STHX; break; in PPCEmitStore()
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| D | PPCRegisterInfo.cpp | 90 ImmToIdxMap[PPC::STH] = PPC::STHX; ImmToIdxMap[PPC::STW] = PPC::STWX; in PPCRegisterInfo()
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| /external/llvm/lib/Target/SystemZ/ |
| D | SystemZInstrInfo.td | 697 // STH, STHY or STHH, depending on the choice of register.
700 defm STH : StoreRXPair<"sth", 0x40, 0xE370, truncstorei16, GR32, 2>;
707 defm : StoreGR64Pair<STH, STHY, truncstorei16>;
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| D | SystemZInstrInfo.cpp | 1085 expandRXYPseudo(MI, SystemZ::STH, SystemZ::STHH); in expandPostRAPseudo()
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| /external/llvm-project/llvm/lib/Target/SystemZ/ |
| D | SystemZInstrInfo.td | 760 // STH, STHY or STHH, depending on the choice of register.
763 defm STH : StoreRXPair<"sth", 0x40, 0xE370, truncstorei16, GR32, 2>;
770 defm : StoreGR64Pair<STH, STHY, truncstorei16>;
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/SystemZ/ |
| D | SystemZInstrInfo.td | 741 // STH, STHY or STHH, depending on the choice of register.
744 defm STH : StoreRXPair<"sth", 0x40, 0xE370, truncstorei16, GR32, 2>;
751 defm : StoreGR64Pair<STH, STHY, truncstorei16>;
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