| /external/swiftshader/third_party/llvm-10.0/llvm/include/llvm/CodeGen/ |
| D | ISDOpcodes.h | 353 STRICT_FSETCC, STRICT_FSETCCS, enumerator
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| D | SelectionDAG.h | 1006 return getNode(IsSignaling ? ISD::STRICT_FSETCCS : ISD::STRICT_FSETCC, DL,
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| /external/llvm-project/llvm/include/llvm/CodeGen/ |
| D | ISDOpcodes.h | 457 STRICT_FSETCCS, enumerator
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| D | SelectionDAG.h | 1095 return getNode(IsSignaling ? ISD::STRICT_FSETCCS : ISD::STRICT_FSETCC, DL,
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| /external/llvm-project/llvm/lib/CodeGen/SelectionDAG/ |
| D | LegalizeVectorOps.cpp | 1401 Node->getOpcode() == ISD::STRICT_FSETCCS) in UnrollStrictFPOp()
1435 Node->getOpcode() == ISD::STRICT_FSETCCS) in UnrollStrictFPOp()
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| D | LegalizeDAG.cpp | 1035 case ISD::STRICT_FSETCCS: in LegalizeOp()
1040 Node->getOpcode() == ISD::STRICT_FSETCCS ? 3 : in LegalizeOp()
1044 Node->getOpcode() == ISD::STRICT_FSETCCS ? 1 : 0; in LegalizeOp()
3745 case ISD::STRICT_FSETCCS: { in ExpandNode()
3747 bool IsSignaling = Node->getOpcode() == ISD::STRICT_FSETCCS; in ExpandNode()
4434 Node->getOpcode() == ISD::STRICT_FSETCCS) in PromoteNode()
4630 case ISD::STRICT_FSETCCS: { in PromoteNode()
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| D | SelectionDAGDumper.cpp | 280 case ISD::STRICT_FSETCCS: return "strict_fsetccs"; in getOperationName()
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| D | LegalizeFloatTypes.cpp | 832 case ISD::STRICT_FSETCCS: in SoftenFloatOperand()
993 Chain, N->getOpcode() == ISD::STRICT_FSETCCS); in SoftenFloatOp_SETCC()
1762 case ISD::STRICT_FSETCCS: in ExpandFloatOperand()
1948 N->getOpcode() == ISD::STRICT_FSETCCS); in ExpandFloatOp_SETCC()
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| D | LegalizeVectorTypes.cpp | 3204 case ISD::STRICT_FSETCCS: in WidenVecRes_StrictFP()
3952 case ISD::STRICT_FSETCCS: in isSETCCOp()
4363 case ISD::STRICT_FSETCCS: Res = WidenVecOp_STRICT_FSETCC(N); break; in WidenVectorOperand()
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| D | SelectionDAGISel.cpp | 1163 case ISD::STRICT_FSETCCS: in DoInstructionSelection()
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/SelectionDAG/ |
| D | SelectionDAGDumper.cpp | 276 case ISD::STRICT_FSETCCS: return "strict_fsetccs"; in getOperationName()
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| D | LegalizeVectorOps.cpp | 1491 Node->getOpcode() == ISD::STRICT_FSETCCS) in UnrollStrictFPOp()
1526 Node->getOpcode() == ISD::STRICT_FSETCCS) in UnrollStrictFPOp()
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| D | LegalizeDAG.cpp | 1035 case ISD::STRICT_FSETCCS: in LegalizeOp()
1040 Node->getOpcode() == ISD::STRICT_FSETCCS ? 3 : in LegalizeOp()
1044 Node->getOpcode() == ISD::STRICT_FSETCCS ? 1 : 0; in LegalizeOp()
3605 case ISD::STRICT_FSETCCS: { in ExpandNode()
3607 bool IsSignaling = Node->getOpcode() == ISD::STRICT_FSETCCS; in ExpandNode()
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| D | LegalizeFloatTypes.cpp | 794 case ISD::STRICT_FSETCCS: in SoftenFloatOperand()
955 Chain, N->getOpcode() == ISD::STRICT_FSETCCS); in SoftenFloatOp_SETCC()
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| D | LegalizeVectorTypes.cpp | 3047 case ISD::STRICT_FSETCCS: in WidenVecRes_StrictFP()
3785 case ISD::STRICT_FSETCCS: in isSETCCOp()
4199 case ISD::STRICT_FSETCCS: Res = WidenVecOp_STRICT_FSETCC(N); break; in WidenVectorOperand()
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| D | SelectionDAGISel.cpp | 1174 case ISD::STRICT_FSETCCS: in DoInstructionSelection()
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| D | SelectionDAG.cpp | 2861 case ISD::STRICT_FSETCCS: { in computeKnownBits()
3749 case ISD::STRICT_FSETCCS: { in ComputeNumSignBits()
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| /external/llvm-project/llvm/lib/Target/PowerPC/ |
| D | PPCTargetTransformInfo.cpp | 487 Opcode = ISD::STRICT_FSETCCS; in mightUseCTR()
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AArch64/ |
| D | AArch64ISelLowering.cpp | 217 setOperationAction(ISD::STRICT_FSETCCS, MVT::f16, Custom); in AArch64TargetLowering()
218 setOperationAction(ISD::STRICT_FSETCCS, MVT::f32, Custom); in AArch64TargetLowering()
219 setOperationAction(ISD::STRICT_FSETCCS, MVT::f64, Custom); in AArch64TargetLowering()
276 setOperationAction(ISD::STRICT_FSETCCS, MVT::f128, Custom); in AArch64TargetLowering()
3162 case ISD::STRICT_FSETCCS: in LowerOperation()
5219 bool IsSignaling = Op.getOpcode() == ISD::STRICT_FSETCCS; in LowerSETCC()
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/SystemZ/ |
| D | SystemZISelLowering.cpp | 141 setOperationAction(ISD::STRICT_FSETCCS, VT, Custom); in SystemZTargetLowering()
392 setOperationAction(ISD::STRICT_FSETCCS, VT, Custom); in SystemZTargetLowering()
5105 case ISD::STRICT_FSETCCS: in LowerOperation()
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| /external/llvm-project/llvm/lib/Target/AArch64/ |
| D | AArch64ISelLowering.cpp | 339 setOperationAction(ISD::STRICT_FSETCCS, MVT::f16, Custom); in AArch64TargetLowering()
340 setOperationAction(ISD::STRICT_FSETCCS, MVT::f32, Custom); in AArch64TargetLowering()
341 setOperationAction(ISD::STRICT_FSETCCS, MVT::f64, Custom); in AArch64TargetLowering()
398 setOperationAction(ISD::STRICT_FSETCCS, MVT::f128, Custom); in AArch64TargetLowering()
4121 case ISD::STRICT_FSETCCS: in LowerOperation()
6465 bool IsSignaling = Op.getOpcode() == ISD::STRICT_FSETCCS; in LowerSETCC()
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| /external/llvm-project/llvm/include/llvm/Target/ |
| D | TargetSelectionDAG.td | 561 def strict_fsetccs : SDNode<"ISD::STRICT_FSETCCS", SDTSetCC, [SDNPHasChain]>;
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| /external/llvm-project/llvm/lib/Target/SystemZ/ |
| D | SystemZISelLowering.cpp | 143 setOperationAction(ISD::STRICT_FSETCCS, VT, Custom); in SystemZTargetLowering()
397 setOperationAction(ISD::STRICT_FSETCCS, VT, Custom); in SystemZTargetLowering()
5361 case ISD::STRICT_FSETCCS: in LowerOperation()
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/ARM/ |
| D | ARMISelLowering.cpp | 1360 setOperationAction(ISD::STRICT_FSETCCS, MVT::f16, Custom); in ARMTargetLowering()
1362 setOperationAction(ISD::STRICT_FSETCCS, MVT::f32, Custom); in ARMTargetLowering()
1364 setOperationAction(ISD::STRICT_FSETCCS, MVT::f64, Custom); in ARMTargetLowering()
9250 bool IsSignaling = Op.getOpcode() == ISD::STRICT_FSETCCS; in LowerFSETCC()
9382 case ISD::STRICT_FSETCCS: return LowerFSETCC(Op, DAG); in LowerOperation()
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| /external/llvm-project/llvm/lib/Target/ARM/ |
| D | ARMISelLowering.cpp | 1413 setOperationAction(ISD::STRICT_FSETCCS, MVT::f16, Custom); in ARMTargetLowering()
1415 setOperationAction(ISD::STRICT_FSETCCS, MVT::f32, Custom); in ARMTargetLowering()
1417 setOperationAction(ISD::STRICT_FSETCCS, MVT::f64, Custom); in ARMTargetLowering()
9681 bool IsSignaling = Op.getOpcode() == ISD::STRICT_FSETCCS; in LowerFSETCC()
9823 case ISD::STRICT_FSETCCS: return LowerFSETCC(Op, DAG); in LowerOperation()
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