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Searched refs:SVEBitwiseLogicalUnpredicatedMask (Results 1 – 3 of 3) sorted by relevance

/external/vixl/src/aarch64/
Dconstants-aarch64.h3077 SVEBitwiseLogicalUnpredicatedMask = 0xFFE0FC00, enumerator
Ddisasm-aarch64.cc8287 switch (instr->Mask(SVEBitwiseLogicalUnpredicatedMask)) { in VisitSVEBitwiseLogicalUnpredicated()
Dsimulator-aarch64.cc7416 Instr op = instr->Mask(SVEBitwiseLogicalUnpredicatedMask); in VisitSVEBitwiseLogicalUnpredicated()