Searched refs:SWR_VTX_NUM_SLOTS (Results 1 – 8 of 8) sorted by relevance
196 SWR_VTX_NUM_SLOTS = (1 + VERTEX_ATTRIB_END_SLOT) enumerator202 simdvector attrib[SWR_VTX_NUM_SLOTS];207 simd16vector attrib[SWR_VTX_NUM_SLOTS];213 typename SIMD_T::Vec4 attrib[SWR_VTX_NUM_SLOTS];279 ScalarAttrib attrib[SWR_VTX_NUM_SLOTS];
78 OSALIGNSIMD(float) newAttribBuffer[4 * 3 * SWR_VTX_NUM_SLOTS]; in RasterizeLine()339 OSALIGNSIMD(float) newAttribBuffer[4 * 3 * SWR_VTX_NUM_SLOTS]; in RasterizeTriPoint()
523 uint32_t primDataDwordVertexStride = (SWR_VTX_NUM_SLOTS * sizeof(float) * 4) / sizeof(uint32_t); in StreamOut()644 SWR_ASSERT(attribCount <= SWR_VTX_NUM_SLOTS); in PackPairsOfSimdVertexIntoSimd16Vertex()1480 SWR_VTX_NUM_SLOTS, in TessellationStages()
546 OSALIGNLINE(float) perspAttribsTLS[vertsPerTri * SWR_VTX_NUM_SLOTS * componentsPerAttrib];
700 SWR_VTX_NUM_SLOTS,
99 INPUT_ELEMENT_DESC layout[SWR_VTX_NUM_SLOTS];
240 pStreamData = GEP(pStreamData, C(SWR_VTX_NUM_SLOTS * 4)); in buildStream()
759 const uint32_t vertSize = attribSize * SWR_VTX_NUM_SLOTS; in swr_gs_llvm_emit_vertex()1524 pGS->outputVertexSize = SWR_VTX_NUM_SLOTS; in CompileGS()1532 (SWR_VTX_NUM_SLOTS * 16) * // sizeof vertex in CompileGS()1757 pTS->dsAllocationSize = SWR_VTX_NUM_SLOTS * MAX_NUM_VERTS_PER_PRIM; in CompileTES()