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Searched refs:S_00B848_SGPRS (Results 1 – 8 of 8) sorted by relevance

/external/llvm-project/llvm/lib/Target/AMDGPU/
DSIProgramInfo.cpp24 return S_00B848_VGPRS(VGPRBlocks) | S_00B848_SGPRS(SGPRBlocks) | in getComputePGMRSrc1()
35 uint64_t Reg = S_00B848_VGPRS(VGPRBlocks) | S_00B848_SGPRS(SGPRBlocks) | in getPGMRSrc1()
DSIDefines.h789 #define S_00B848_SGPRS(x) (((x) & 0x0F) << 6) macro
/external/llvm/lib/Target/AMDGPU/
DSIDefines.h260 #define S_00B848_SGPRS(x) (((x) & 0x0F) << 6) macro
DAMDGPUAsmPrinter.cpp541 S_00B848_SGPRS(ProgInfo.SGPRBlocks) | in getSIProgramInfo()
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AMDGPU/
DSIDefines.h555 #define S_00B848_SGPRS(x) (((x) & 0x0F) << 6) macro
DAMDGPUAsmPrinter.cpp1079 S_00B848_SGPRS(ProgInfo.SGPRBlocks) | in getSIProgramInfo()
/external/mesa3d/src/gallium/drivers/radeonsi/
Dsi_compute.c200 shader->config.rsrc1 |= S_00B848_SGPRS((shader->config.num_sgprs - 1) / 8); in si_create_compute_state_async()
Dsi_compute_prim_discard.c1381 S_00B848_SGPRS(sctx->chip_class <= GFX9 ? (shader->config.num_sgprs - 1) / 8 : 0) | in si_dispatch_prim_discard_cs_and_draw()