/external/llvm/lib/Target/PowerPC/ |
D | PPCRegisterInfo.cpp | 563 unsigned ShiftBits = getEncodingValue(DestReg)*4; in lowerCRRestore() local 566 .addReg(Reg1, RegState::Kill).addImm(32-ShiftBits).addImm(0) in lowerCRRestore() 650 unsigned ShiftBits = getEncodingValue(DestReg); in lowerCRBitRestore() local 655 .addImm(ShiftBits ? 32 - ShiftBits : 0) in lowerCRBitRestore() 656 .addImm(ShiftBits) in lowerCRBitRestore() 657 .addImm(ShiftBits); in lowerCRBitRestore()
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/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/PowerPC/ |
D | PPCRegisterInfo.cpp | 716 unsigned ShiftBits = getEncodingValue(DestReg)*4; in lowerCRRestore() local 719 .addReg(Reg1, RegState::Kill).addImm(32-ShiftBits).addImm(0) in lowerCRRestore() 868 unsigned ShiftBits = getEncodingValue(DestReg); in lowerCRBitRestore() local 873 .addImm(ShiftBits ? 32 - ShiftBits : 0) in lowerCRBitRestore() 874 .addImm(ShiftBits) in lowerCRBitRestore() 875 .addImm(ShiftBits); in lowerCRBitRestore()
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/external/llvm-project/llvm/lib/Target/PowerPC/ |
D | PPCRegisterInfo.cpp | 780 unsigned ShiftBits = getEncodingValue(DestReg)*4; in lowerCRRestore() local 783 .addReg(Reg1, RegState::Kill).addImm(32-ShiftBits).addImm(0) in lowerCRRestore() 942 unsigned ShiftBits = getEncodingValue(DestReg); in lowerCRBitRestore() local 947 .addImm(ShiftBits ? 32 - ShiftBits : 0) in lowerCRBitRestore() 948 .addImm(ShiftBits) in lowerCRBitRestore() 949 .addImm(ShiftBits); in lowerCRBitRestore()
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/external/OpenCL-CTS/test_conformance/gl/ |
D | helpers.cpp | 348 const cl_uint ShiftBits = (glDataType == GL_UNSIGNED_INT_24_8) ? 8 : 0; in convert_to_expected() local 351 outData[ i ] = (cl_float)(src[ i ] >> ShiftBits) / MaxValue; in convert_to_expected()
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/external/llvm/lib/Analysis/ |
D | BasicAliasAnalysis.cpp | 329 unsigned ShiftBits = 64 - PointerSize; in adjustToPointerSize() local 330 return (int64_t)((uint64_t)Offset << ShiftBits) >> ShiftBits; in adjustToPointerSize()
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/external/llvm/lib/CodeGen/SelectionDAG/ |
D | TargetLowering.cpp | 1863 unsigned ShiftBits = AndRHSC.countTrailingZeros(); in SimplifySetCC() local 1870 DAG.getConstant(ShiftBits, dl, in SimplifySetCC() 1872 SDValue CmpRHS = DAG.getConstant(C1.lshr(ShiftBits), dl, CmpTy); in SimplifySetCC() 1883 unsigned ShiftBits; in SimplifySetCC() local 1887 ShiftBits = C1.countTrailingOnes(); in SimplifySetCC() 1891 ShiftBits = C1.countTrailingZeros(); in SimplifySetCC() 1893 NewC = NewC.lshr(ShiftBits); in SimplifySetCC() 1894 if (ShiftBits && NewC.getMinSignedBits() <= 64 && in SimplifySetCC() 1902 DAG.getConstant(ShiftBits, dl, ShiftTy)); in SimplifySetCC()
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D | DAGCombiner.cpp | 2969 unsigned ShiftBits = CShift->getZExtValue(); in visitANDLike() local 2976 (ShiftBits + MaskBits <= Size / 2) && in visitANDLike() 2988 assert(ShiftBits != 0 && MaskBits <= Size); in visitANDLike() 2996 SDValue ShiftK = DAG.getConstant(ShiftBits, SL, ShiftVT); in visitANDLike()
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/external/llvm-project/llvm/lib/Analysis/ |
D | BasicAliasAnalysis.cpp | 395 unsigned ShiftBits = Offset.getBitWidth() - PointerSize; in adjustToPointerSize() local 396 return (Offset << ShiftBits).ashr(ShiftBits); in adjustToPointerSize()
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/external/swiftshader/third_party/llvm-10.0/llvm/lib/Analysis/ |
D | BasicAliasAnalysis.cpp | 438 unsigned ShiftBits = Offset.getBitWidth() - PointerSize; in adjustToPointerSize() local 439 return (Offset << ShiftBits).ashr(ShiftBits); in adjustToPointerSize()
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/external/llvm-project/llvm/lib/CodeGen/SelectionDAG/ |
D | TargetLowering.cpp | 4033 unsigned ShiftBits = AndRHSC.countTrailingZeros(); in SimplifySetCC() local 4034 if (!TLI.shouldAvoidTransformToShift(ShValTy, ShiftBits)) { in SimplifySetCC() 4037 DAG.getConstant(ShiftBits, dl, ShiftTy)); in SimplifySetCC() 4038 SDValue CmpRHS = DAG.getConstant(C1.lshr(ShiftBits), dl, ShValTy); in SimplifySetCC() 4050 unsigned ShiftBits; in SimplifySetCC() local 4054 ShiftBits = C1.countTrailingOnes(); in SimplifySetCC() 4058 ShiftBits = C1.countTrailingZeros(); in SimplifySetCC() 4060 NewC.lshrInPlace(ShiftBits); in SimplifySetCC() 4061 if (ShiftBits && NewC.getMinSignedBits() <= 64 && in SimplifySetCC() 4063 !TLI.shouldAvoidTransformToShift(ShValTy, ShiftBits)) { in SimplifySetCC() [all …]
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D | DAGCombiner.cpp | 4997 unsigned ShiftBits = CShift->getZExtValue(); in visitANDLike() local 5000 if (ShiftBits == 0) in visitANDLike() 5009 (ShiftBits + MaskBits <= Size / 2) && in visitANDLike() 5029 SDValue ShiftK = DAG.getConstant(ShiftBits, SL, ShiftVT); in visitANDLike()
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/external/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/SelectionDAG/ |
D | TargetLowering.cpp | 3723 unsigned ShiftBits = AndRHSC.countTrailingZeros(); in SimplifySetCC() local 3724 if (!TLI.shouldAvoidTransformToShift(ShValTy, ShiftBits)) { in SimplifySetCC() 3727 DAG.getConstant(ShiftBits, dl, ShiftTy)); in SimplifySetCC() 3728 SDValue CmpRHS = DAG.getConstant(C1.lshr(ShiftBits), dl, ShValTy); in SimplifySetCC() 3740 unsigned ShiftBits; in SimplifySetCC() local 3744 ShiftBits = C1.countTrailingOnes(); in SimplifySetCC() 3748 ShiftBits = C1.countTrailingZeros(); in SimplifySetCC() 3750 NewC.lshrInPlace(ShiftBits); in SimplifySetCC() 3751 if (ShiftBits && NewC.getMinSignedBits() <= 64 && in SimplifySetCC() 3753 !TLI.shouldAvoidTransformToShift(ShValTy, ShiftBits)) { in SimplifySetCC() [all …]
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D | DAGCombiner.cpp | 4724 unsigned ShiftBits = CShift->getZExtValue(); in visitANDLike() local 4727 if (ShiftBits == 0) in visitANDLike() 4736 (ShiftBits + MaskBits <= Size / 2) && in visitANDLike() 4756 SDValue ShiftK = DAG.getConstant(ShiftBits, SL, ShiftVT); in visitANDLike()
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/external/llvm/lib/Target/X86/ |
D | X86ISelLowering.cpp | 4604 SDValue ShiftBits = DAG.getConstant(IdxVal, dl, MVT::i8); in insert1BitVector() local 4605 WideSubVec = DAG.getNode(X86ISD::VSHLI, dl, WideOpVT, WideSubVec, ShiftBits); in insert1BitVector() 4623 SDValue ShiftBits = DAG.getConstant(SubVecNumElems, dl, MVT::i8); in insert1BitVector() local 4625 Vec = DAG.getNode(X86ISD::VSRLI, dl, WideOpVT, Vec, ShiftBits); in insert1BitVector() 4626 Vec = DAG.getNode(X86ISD::VSHLI, dl, WideOpVT, Vec, ShiftBits); in insert1BitVector() 4640 SDValue ShiftBits = DAG.getConstant(SubVecNumElems, dl, MVT::i8); in insert1BitVector() local 4642 Vec = DAG.getNode(X86ISD::VSHLI, dl, WideOpVT, Vec, ShiftBits); in insert1BitVector() 4643 Vec = DAG.getNode(X86ISD::VSRLI, dl, WideOpVT, Vec, ShiftBits); in insert1BitVector()
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/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/ARM/ |
D | ARMISelLowering.cpp | 4291 unsigned ShiftBits = countLeadingZeros(Mask); in getARMCmp() local 4292 if (RHSV && (RHSV > 255 || (RHSV << ShiftBits) <= 255)) { in getARMCmp() 4293 SDValue ShiftAmt = DAG.getConstant(ShiftBits, dl, MVT::i32); in getARMCmp() 4295 RHS = DAG.getConstant(RHSV << ShiftBits, dl, MVT::i32); in getARMCmp()
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/external/llvm-project/llvm/lib/Target/ARM/ |
D | ARMISelLowering.cpp | 4569 unsigned ShiftBits = countLeadingZeros(Mask); in getARMCmp() local 4570 if (RHSV && (RHSV > 255 || (RHSV << ShiftBits) <= 255)) { in getARMCmp() 4571 SDValue ShiftAmt = DAG.getConstant(ShiftBits, dl, MVT::i32); in getARMCmp() 4573 RHS = DAG.getConstant(RHSV << ShiftBits, dl, MVT::i32); in getARMCmp()
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/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/X86/ |
D | X86ISelLowering.cpp | 5861 SDValue ShiftBits = DAG.getTargetConstant(SubVecNumElems, dl, MVT::i8); in insert1BitVector() local 5864 Vec = DAG.getNode(X86ISD::KSHIFTR, dl, WideOpVT, Vec, ShiftBits); in insert1BitVector() 5865 Vec = DAG.getNode(X86ISD::KSHIFTL, dl, WideOpVT, Vec, ShiftBits); in insert1BitVector() 5913 SDValue ShiftBits = DAG.getTargetConstant(NumElems - IdxVal, dl, MVT::i8); in insert1BitVector() local 5914 Vec = DAG.getNode(X86ISD::KSHIFTL, dl, WideOpVT, Vec, ShiftBits); in insert1BitVector() 5915 Vec = DAG.getNode(X86ISD::KSHIFTR, dl, WideOpVT, Vec, ShiftBits); in insert1BitVector()
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/external/llvm-project/llvm/lib/Target/X86/ |
D | X86ISelLowering.cpp | 6120 SDValue ShiftBits = DAG.getTargetConstant(SubVecNumElems, dl, MVT::i8); in insert1BitVector() local 6123 Vec = DAG.getNode(X86ISD::KSHIFTR, dl, WideOpVT, Vec, ShiftBits); in insert1BitVector() 6124 Vec = DAG.getNode(X86ISD::KSHIFTL, dl, WideOpVT, Vec, ShiftBits); in insert1BitVector() 6172 SDValue ShiftBits = DAG.getTargetConstant(NumElems - IdxVal, dl, MVT::i8); in insert1BitVector() local 6173 Vec = DAG.getNode(X86ISD::KSHIFTL, dl, WideOpVT, Vec, ShiftBits); in insert1BitVector() 6174 Vec = DAG.getNode(X86ISD::KSHIFTR, dl, WideOpVT, Vec, ShiftBits); in insert1BitVector()
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