Searched refs:ShiftOperand (Results 1 – 5 of 5) sorted by relevance
| /external/vixl/src/aarch64/ |
| D | simulator-aarch64.cc | 484 int64_t Simulator::ShiftOperand(unsigned reg_size, in ShiftOperand() function in vixl::aarch64::Simulator
574 return ShiftOperand(reg_size, value, LSL, left_shift); in ExtendValue()
614 offset = ShiftOperand(kXRegSize, offset, mem_op.GetShift(), shift_amount); in ComputeMemOperandAddress()
1800 int64_t op2 = ShiftOperand(reg_size, in VisitAddSubShifted()
1876 int64_t op2 = ShiftOperand(reg_size, in VisitLogicalShifted()
3410 result = ShiftOperand(reg_size, in VisitDataProcessing2Source()
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| D | logic-aarch64.cc | 6842 int64_t result = ShiftOperand(lane_size, in SVEBitwiseShiftHelper()
6867 value = ShiftOperand(kDRegSize, value, ASR, shift); in asrd()
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| D | simulator-aarch64.h | 2829 int64_t ShiftOperand(unsigned reg_size,
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| /external/llvm-project/llvm/lib/CodeGen/SelectionDAG/ |
| D | DAGCombiner.cpp | 8291 SDValue ShiftOperand = N->getOperand(0); in combineShiftToMULH() local
8292 if (ShiftOperand.getOpcode() != ISD::MUL) in combineShiftToMULH()
8296 SDValue LeftOp = ShiftOperand.getOperand(0); in combineShiftToMULH()
8297 SDValue RightOp = ShiftOperand.getOperand(1); in combineShiftToMULH()
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| /external/llvm-project/llvm/lib/Target/X86/ |
| D | X86ISelLowering.cpp | 42394 SDValue ShiftOperand = N->getOperand(0); in combineShiftToPMULH() local
42395 if (ShiftOperand.getOpcode() != ISD::MUL || !ShiftOperand.hasOneUse()) in combineShiftToPMULH()
42409 SDValue LHS = ShiftOperand.getOperand(0); in combineShiftToPMULH()
42410 SDValue RHS = ShiftOperand.getOperand(1); in combineShiftToPMULH()
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