/external/llvm-project/llvm/lib/Target/PowerPC/MCTargetDesc/ |
D | PPCXCOFFObjectWriter.cpp | 22 static constexpr uint8_t SignBitMask = 0x80; member in __anon9e598dfe0111::PPCXCOFFObjectWriter 52 const uint8_t EncodedSignednessIndicator = IsPCRel ? SignBitMask : 0u; in getRelocTypeAndSignSize()
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/external/llvm-project/llvm/include/llvm/ADT/ |
D | Bitfields.h | 110 static constexpr Unsigned SignBitMask = Unsigned(1) << (Bits - 1); // 00100000 member 148 if (StorageValue >= T(BP::SignBitMask))
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/external/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/GlobalISel/ |
D | LegalizerHelper.cpp | 4056 auto SignBitMask = MIRBuilder.buildConstant( in lowerFCopySign() local 4066 auto And1 = MIRBuilder.buildAnd(Src1Ty, Src0, SignBitMask); in lowerFCopySign() 4072 auto And1 = MIRBuilder.buildAnd(Src0Ty, Shift, SignBitMask); in lowerFCopySign() 4078 auto And1 = MIRBuilder.buildAnd(Src0Ty, Trunc, SignBitMask); in lowerFCopySign()
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/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AMDGPU/ |
D | AMDGPULegalizerInfo.cpp | 1451 const auto SignBitMask = B.buildConstant(S32, UINT32_C(1) << 31); in legalizeIntrinsicTrunc() local 1452 auto SignBit = B.buildAnd(S32, Hi, SignBitMask); in legalizeIntrinsicTrunc()
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D | AMDGPUISelLowering.cpp | 2099 const SDValue SignBitMask = DAG.getConstant(UINT32_C(1) << 31, SL, MVT::i32); in LowerFTRUNC() local 2100 SDValue SignBit = DAG.getNode(ISD::AND, SL, MVT::i32, Hi, SignBitMask); in LowerFTRUNC()
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/external/llvm-project/llvm/lib/CodeGen/GlobalISel/ |
D | LegalizerHelper.cpp | 5414 auto SignBitMask = MIRBuilder.buildConstant( in lowerFCopySign() local 5424 auto And1 = MIRBuilder.buildAnd(Src1Ty, Src1, SignBitMask); in lowerFCopySign() 5430 auto And1 = MIRBuilder.buildAnd(Src0Ty, Shift, SignBitMask); in lowerFCopySign() 5436 auto And1 = MIRBuilder.buildAnd(Src0Ty, Trunc, SignBitMask); in lowerFCopySign()
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/external/swiftshader/third_party/llvm-10.0/llvm/lib/Transforms/InstCombine/ |
D | InstCombineAndOrXor.cpp | 935 APInt &SignBitMask) -> bool { in foldSignedTruncationCheck() argument 943 SignBitMask = *I01; in foldSignedTruncationCheck()
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/external/llvm-project/llvm/lib/Transforms/InstCombine/ |
D | InstCombineAndOrXor.cpp | 875 APInt &SignBitMask) -> bool { in foldSignedTruncationCheck() argument 883 SignBitMask = *I01; in foldSignedTruncationCheck()
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/external/llvm/lib/Target/AMDGPU/ |
D | AMDGPUISelLowering.cpp | 1663 const SDValue SignBitMask = DAG.getConstant(UINT32_C(1) << 31, SL, MVT::i32); in LowerFTRUNC() local 1664 SDValue SignBit = DAG.getNode(ISD::AND, SL, MVT::i32, Hi, SignBitMask); in LowerFTRUNC()
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/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/NVPTX/ |
D | NVPTXISelLowering.cpp | 2107 const int SignBitMask = 0x80000000; in LowerFROUND32() local 2109 DAG.getConstant(SignBitMask, SL, MVT::i32)); in LowerFROUND32()
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/external/llvm-project/llvm/lib/Target/NVPTX/ |
D | NVPTXISelLowering.cpp | 2090 const int SignBitMask = 0x80000000; in LowerFROUND32() local 2092 DAG.getConstant(SignBitMask, SL, MVT::i32)); in LowerFROUND32()
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/external/llvm-project/llvm/lib/Target/AMDGPU/ |
D | AMDGPULegalizerInfo.cpp | 1971 const auto SignBitMask = B.buildConstant(S32, UINT32_C(1) << 31); in legalizeIntrinsicTrunc() local 1972 auto SignBit = B.buildAnd(S32, Hi, SignBitMask); in legalizeIntrinsicTrunc()
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D | AMDGPUISelLowering.cpp | 2167 const SDValue SignBitMask = DAG.getConstant(UINT32_C(1) << 31, SL, MVT::i32); in LowerFTRUNC() local 2168 SDValue SignBit = DAG.getNode(ISD::AND, SL, MVT::i32, Hi, SignBitMask); in LowerFTRUNC()
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